研究者詳細 - 渡邊　実

Programmable optically reconfigurable gate array using a silver-halide holographic memory including six configuration contexts 査読

S. Kubota, M. Watanabe

International Conference on Solid State Devices and Materials 67 - 68 2010年9月

Estimation of characteristic variation of photodiodes and its compensation method in an optically reconfigurable gate array 査読

Yuji Aoyama, Minoru Watanabe

23rd IEEE International SOC Conference 243 - 247 2010年9月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

Optically reconfigurable gate arrays (ORGAs) have been developed to realize large virtual gates and to increase gate array performance. Since the performance of gate arrays in dynamically reconfigurable gate arrays can be increased as increasing its reconfiguration clock frequency, a high-speed reconfiguration capability is extremely important. However, the efficiency of a conventional optical configuration is not good because the optical configuration speed suffers from the photodiode characteristic variation, optical component variation, alignment errors, and holographic memory properties. This paper therefore presents a proposal of a compensation method using an analog configuration context that can improve the optical configuration efficiency. Based on the experimental results, this paper presents a discussion of its performance. © 2010 IEEE.

DOI： 10.1109/SOCC.2010.5784753

Microelectromechanical Configuration of an Optically Reconfigurable Gate Array 査読

Hironobu Morita, Minoru Watanabe

IEEE JOURNAL OF QUANTUM ELECTRONICS 46 ( 9 ) 1288 - 1294 2010年9月

記述言語：英語掲載種別：研究論文（学術雑誌）出版者・発行元：IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC

This paper presents a proposal of a novel optically reconfigurable gate array architecture with a microelectromechanical system (MEMS) mirror array that allows high-speed reconfiguration by exploiting large-bandwidth optical connections between the MEMS mirror array and a programmable gate array. The MEMS mirror array is used as a holographic memory. Four configuration contexts can be programmed electrically and dynamically onto the MEMS mirror array as holographic memory information. The configuration procedure is executed by switching both a laser array and an MEMS mirror array. This experiment demonstrated a four-context 146 ns microelectromechanical configuration for a programmable gate array. Submicrosecond configuration is attainable.

DOI： 10.1109/JQE.2010.2047378

Relationship between alignment errors of optical components and power consumption in optoelectronic devices 査読

Hironobu Morita, Minoru Watanabe

2010 IEEE CPMT Symposium Japan, ICSJ10 2010年8月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

Field Programmable Gate Arrays (FPGAs) have been used widely in recent years because of their flexible reconfiguration capabilities. Moreover, demand of high-speed reconfiguration for FPGAs has been increasing. However, since reconfiguration of FPGAs cannot be increased because of the serial transfer of configuration data, new optically reconfigurable gate arrays (ORGAs) have been proposed as an alternative device to achieve high-speed reconfiguration and numerous reconfiguration contexts. However, in the ORGAs, alignment errors affect the configuration power consumption. This paper presents the relation between alignment errors of optical components and power consumption in optoelectronic devices. ©2010 IEEE.

DOI： 10.1109/CPMTSYMPJ.2010.5680217

Superimposing acceleration and optimization method of optical reconfiguration speed without any increase of laser power 査読

Takayuki Mabuchi, Minoru Watanabe

APPLIED OPTICS 49 ( 22 ) 4120 - 4126 2010年8月

記述言語：英語掲載種別：研究論文（学術雑誌）出版者・発行元：OPTICAL SOC AMER

This paper proposes a method of superimposing acceleration and optimizing the optical reconfiguration speed while requiring no increase of laser power. Using this technique, the optical reconfiguration speed is increased by superimposing multiple configuration contexts. Simultaneously, optimization of the number of configuration contexts and reconfiguration speed is possible. A full four-context optically reconfigurable gate array system consisting of an optically reconfigurable gate array VLSI, an easily rewritable liquid crystal holographic memory, and four vertical-cavity surface-emitting lasers was constructed to demonstrate this method. This paper clarifies the method's benefits using experimental results obtained from the demonstration system. (C) 2010 Optical Society of America

DOI： 10.1364/AO.49.004120

Formation of holographic memory for defect tolerance in optically reconfigurable gate arrays 査読

OGIWARA Akifumi, WATANABE Minoru, MABUCHI Takayuki, KOBAYASHI Fuminori

APPLIED OPTICS 49 ( 22 ) 4255 - 4261 2010年8月

A superimposing acceleration and optimization method of optical reconfiguration speed without any increase of laser power 査読

MABUCHI Takayuki, WATANABE Minoru

APPLIED OPTICS 49 ( 22 ) 4120 - 4126 2010年8月

Formation of holographic memory for defect tolerance in optically reconfigurable gate arrays 査読

Akifumi Ogiwara, Minoru Watanabe, Takayuki Mabuchi, Fuminori Kobayashi

APPLIED OPTICS 49 ( 22 ) 4255 - 4261 2010年8月

記述言語：英語掲載種別：研究論文（学術雑誌）出版者・発行元：OPTICAL SOC AMER

Holographic polymer-dispersed liquid-crystal (HPDLC) memory using liquid-crystal composites is proposed for new optical information processing. Formation of HPDLC memory using a photomask is discussed for parallel programmability to realize fast reconfiguration of optically reconfigurable gate arrays (ORGAs). The defect tolerance of HPDLC memory is investigated to clarify the defect limitation of holographic configurations using ORGAs. Experimental results show that the noise ratio less than 15% applied to HPDLC memory rarely affects its diffraction pattern or a reconfiguration context. (C) 2010 Optical Society of America

DOI： 10.1364/AO.49.004255

Influence analysis of a holographic memory window of a programmable optically reconfigurable gate array 査読

Shinya Kubota, Minoru Watanabe

2010 53rd IEEE International Midwest Symposium on Circuits and Systems 913 - 916 2010年8月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）出版者・発行元：IEEE

Recently, optically reconfigurable gate arrays (ORGAs), which consist of a gate array VLSI, a holographic memory, and a laser array, have been developed to achieve a huge virtual gate count that is much larger than those of currently available VLSIs. However, comparison of conventional ORGAs with current field programmable gate arrays (FPGAs) reveals one important shortcoming: they are not reprogrammable after fabrication. To remove that shortcoming, a programmable ORGA (PORGA) has been proposed. However, a PORGA must implement a window to detect holographic memory patterns. A PORGA window might have scratches, fingerprints, or other defects that could occur while a PORGA is used. Even under such situations, a PORGA must be programmable. This paper therefore presents influence analysis of a holographic memory window of a PORGA. It has been demonstrated that even if a window of PORGA has scratches, fingerprint, or defects, a programming procedure can be executed correctly.

DOI： 10.1109/MWSCAS.2010.5548776

Excellent fault tolerance of a MEMS optically differential reconfigurable gate array 査読

Hironobu Morita, Minoru Watanabe

2010 International Conference on Optical MEMS and Nanophotonics, Optical MEMS and Nanophotonics 2010 133 - 134 2010年8月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

(Figure Presented) This paper presents a four-context MEMS optically differential reconfigurable gate array that is useful in a space radiation environment. The technique enables rapid recovery of a programmable device that has been damaged by high-energy charged particles. It can use incorrect configuration data including some error bits resulting from damage by particles. This paper also clarifies the fault tolerance of the MEMS optically differential reconfigurable gate array. ©2010 IEEE.

DOI： 10.1109/OMEMS.2010.5672149

Dynamically reconfigurable vision-chip architecture 査読

Maki Yasuda, Minoru Watanabe

2010 International Conference on Field Programmable Logic and Applications, FPL 2010 508 - 512 2010年8月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

Recently, for autonomous vehicles and robots, demand has been increasing for high-speed image recognition that is superior to that of the human eye. To date, analogtype vision chips and digital vision chips have been developed. Nevertheless, even now, to realize such high-speed real-time image recognition operation is extremely difficult. Therefore, to realize a high-speed real-time image-recognizable vision chip, this paper presents a proposal for a dynamically reconfigurable vision chip architecture. In addition, some experimental results are reported. © 2010 IEEE.

DOI： 10.1109/FPL.2010.101

Binary MEMS optically reconfigurable gate array 査読

Hironobu Morita, Minoru Watanabe

Proceedings - 9th IEEE/ACIS International Conference on Computer and Information Science, ICIS 2010 63 - 68 2010年8月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

Demand for high-speed dynamic reconfiguration for programmable devices has increased since such fast dynamic reconfiguration can increase the programmable gate array performance. To meet that demand, optically reconfigurable gate arrays (ORGAs) have been developed to achieve the fast dynamic reconfiguration. Among such studies, a MEMS ORGA has been developed. The reconfiguration can be executed not only by switching a laser array but also by switching a holographic memory. The first proposed MEMS ORGA took an analog fringe pattern for generating a configuration context, although the MEMS device is a binary spatial light modulator. The switching capability can therefore not be fully exploited from a MEMS device since a MEMS device requires PWM control for generating an analog fringe pattern. This paper presents a novel binary MEMS ORGA. The binary MEMS ORGA has achieved a 312 ns laser-reconfiguration and 22 μs holographic memory switching. © 2010 IEEE.

DOI： 10.1109/ICIS.2010.89

Programmable optically reconfigurable gate array using a silver-halide holographic memory 査読

Shinya Kubota, Minoru Watanabe

2010 15TH OPTOELECTRONICS AND COMMUNICATIONS CONFERENCE 370 - 371 2010年7月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）出版者・発行元：IEEE

This paper presents a new programmable optically reconfigurable gate array using a silver-halide non-volatile holographic memory and its writer system. This device achieves high-speed reconfiguration, numerous reconfiguration contexts and user programmability.

Partial block-by-block reconfiguration for a dynamic optically reconfigurable gate array 査読

D. Seto, M. Watanabe

International Conference on engineering of reconfigurable systems and algorithms 232 - 237 2010年7月

A four-context optically reconfigurable gate array using a laser array attachment 査読

T. Mabuchi, M. Watanabe

International Workshop on Highly Efficient Accelerators and Reconfigurable Technologies 143 - 147 2010年6月

Recovery method for a turn-off failure mode of a laser array on an ORGA 査読

Daisaku Seto, Minoru Watanabe

2010 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2010 235 - 240 2010年6月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

Demand for a large-gate-count robust VLSI chip that is usable in a radiation-rich space environment is increasing daily. Optically reconfigurable gate arrays (ORGAs) have been developed to realize a large virtual gate count that is much larger than those of current VLSI chips by exploiting the large storage capacity of a holographic memory. The ORGA architecture is extremely robust for many failure modes caused by high-energy charged particles. However, the ORGA has only an unallowable failure mode, which is a turn-off failure mode of a laser array. This paper therefore presents a proposal of a recovery method for a turn-off failure mode of a laser array on an ORGA and presents its demonstration results. © 2010 IEEE.

DOI： 10.1109/AHS.2010.5546252

Acceleration method of optical reconfigurations using analog configuration contexts 査読

Yuji Aoyama, Minoru Watanabe

2010 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2010 304 - 308 2010年6月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

Optically reconfigurable gate arrays (ORGAs) consisting of a holographic memory, a laser array, and a programmable gate array have been developed to realize large virtual gates and to increase a gate array's performance. To date, all ORGAs used binary values for optically applied configuration contexts. However, the energy efficiency is not good. Therefore, this paper presents a novel acceleration method of optical reconfigurations using analog configuration contexts. © 2010 IEEE.

DOI： 10.1109/AHS.2010.5546242

A 100-context optically reconfigurable gate array 査読

Mao Nakajima, Minoru Watanabe

2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS 2884 - 2887 2010年5月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）出版者・発行元：IEEE

To date, optically reconfigurable gate arrays (ORGAs) have been developed to realize large virtual gates and to increase gate array performance by combining a holographic memory with a programmable gate array. Among such studies, a 16-context ORGA architecture with nanosecond-order reconfiguration capability has already been demonstrated. However, its reconfiguration contexts are too few to execute large real-time operations. This paper therefore presents a proposal of a more advanced 100-context ORGA architecture in addition to related experimental results.

DOI： 10.1109/ISCAS.2010.5536965