研究者詳細 - 渡邊　実

A full dynamically reconfigurable vision-chip system including a lens-array 査読

Y. Kamikubo, M. Watanabe, S. Kawahito

Workshop on Synthesis And System Integration of Mixed Information technologies 272 - 277 2012年3月

Dependable Optically Reconfigurable Gate Array

Minoru Watanabe

2012 International Workshop on Advanced Nanovision Science 47 - 50 2012年1月

Binary MEMS optically reconfigurable gate array for an artificial brain system 査読

Yuichiro Yamaji, Minoru Watanabe

PROCEEDINGS OF THE SEVENTEENTH INTERNATIONAL SYMPOSIUM ON ARTIFICIAL LIFE AND ROBOTICS (AROB 17TH '12) 614 - 617 2012年1月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）出版者・発行元：ALIFE ROBOTICS CO, LTD

Optically reconfigurable gate arrays (ORGAs) consisting of a holographic memory, a laser diode array, and a programmable gate array were developed to realize an artificial brain system for robots. In the ORGA, much information or many reconfiguration contexts can be stored in a volume-type holographic memory and can be programmed dynamically onto a programmable gate array at nanosecond-order perfectly in parallel. Therefore, by exploiting the huge storage capacity of the holographic memory and large parallel operations on a programmable gate array, huge parallel brain operations can be executed quickly on an ORGA. This paper presents a proposal of a binary MEMS-interleaving reconfiguration operation on an optically reconfigurable gate array for an artificial brain system.

Gray-level image recmgnitimrmn a dynamically recmnfigurablevisimnarchitecture 査読

Yuki Kamikubo, Minonu Witanabe, Shoji Kawahito

International System on Chip Conference 61 - 65 2012年

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

Recently, for fse in aftonomofs vehicles and robots, demand has been increasing for high-speed image recognition that is sfperior to that of the hfman eye. However, to recognize nfmerofs images qfickly, sfch system reqfires many template images to be read oft dynamically from memory. They mfst then be sent to a processor qfickly. Realizing sfch high-speed real-time image recognition operation is difficflt becafse of the bottleneck of transfer speed between the memory and the processor. Therefore, to improve the bottleneck, a dynamically reconfigfrable vision architectfre that can recognize binarized images has been presented. However, to date, no dynamically reconfigfrable vision architectfre that can recognize gray-level images has ever been presented. Therefore, this paper presents experimentation related to a more advanced dynamically reconfigfrable vision architectfre that can recognize gray-level images. © 2012 IEEE.

DOI： 10.1109/SOCC.2012.6398381

Holographic polymer-dispersed liquid crystal memory for optically reconfigurable gate array using subwavelength grating mask 査読

Akifumi Ogiwara, Minoru Watanabe, Takayuki Mabuchi, Fuminori Kobayashi

APPLIED OPTICS 50 ( 34 ) 6369 - 6376 2011年12月

記述言語：英語掲載種別：研究論文（学術雑誌）出版者・発行元：OPTICAL SOC AMER

Holographic polymer-dispersed liquid crystal (HPDLC) memory formed by a subwavelength grating (SWG) mask is presented for new optical information processing. The SWG structure in a photomask is formed on the SiO2 plate using the anisotropic reactive ion etching technique. The configuration contexts for optically reconfigurable gate arrays (ORGAs) are stored in the HPDLC memory by polarization modulation property based on the form birefringence of the SWGplate. The configuration context pattern in the HPDLC memory is reconstructed to write it for the ORGAs under parallel programmability. (C) 2011 Optical Society of America

DOI： 10.1364/AO.50.006369

An FPGA Connect6 Solver with a Two-Stage Pipelined Evaluation 査読

Takahiro Watanabe, Retsu Moriwaki, Yuichiro Yamaji, Yuki Kamikubo, Yuki Torigai, Yuki Nihira, Takashi Yoza, Yumiko Ueno, Yuji Aoyama, Minoru Watanabe

2011 International Conference on Field-Programmable Technology, FPT 2011 2011年12月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

Recently, immediately following invention of a Connect6 game, many game programs were developed aggressively. However, because the solution space of the Connect6 game is extremely large, the computation powers of current computers are quite insufficient to search all possible solutions. This paper therefore presents a proposal of a field programmable gate array (FPGA) Connect6 Solver with a two-stage pipelined evaluation exploiting numerous zero-evaluation functions to evaluate only a zero value and a small number of detailed evaluation functions which can evaluate all range. The FPGA Connect6 Solver implemented onto a Cyclone IV FPGA is able to defeat target software provided by the 2011 International Conference on Field-Programmable Technology (ICFPT) within the time limit of 1 s for each turn. In addition, the FPGA Connect6 Solver can defeat another JAVA-based software program with a similar algorithm. At that time, the operation speed of the FPGA Connect6 Solver is 764.2 times higher than that of the software operating on a personal computer (Vostro 220S
Dell Inc.) with a 3.16 GHz, Core 2 Duo processor (Intel Corp.). © 2011 IEEE.

DOI： 10.1109/FPT.2011.6133249

Full liquid crystal spatial light modulator writer system for a programmable optically reconfigurable gate array 査読

S. Kubota, M. Watanabe

MICROOPTICS CONFERENCE H-47 2011年11月

Holographic polymer-dispersed liquid crystal memory for optically reconfigurable gate array using subwavelength grating mask 査読

OGIWARA Akifumi, WATANABE Minoru, MABUCHI Takayuki, KOBAYASHI Fuminori

APPLIED OPTICS 50 ( 34 ) 6369 - 6376 2011年11月

Robust holographic storage system design 査読

Takahiro Watanabe, Minoru Watanabe

OPTICS EXPRESS 19 ( 24 ) 24147 - 24158 2011年11月

記述言語：英語掲載種別：研究論文（学術雑誌）出版者・発行元：OPTICAL SOC AMER

Demand is increasing daily for large data storage systems that are useful for applications in spacecraft, space satellites, and space robots, which are all exposed to radiation-rich space environment. As candidates for use in space embedded systems, holographic storage systems are promising because they can easily provided the demanded large-storage capability. Particularly, holographic storage systems, which have no rotation mechanism, are demanded because they are virtually maintenance-free. Although a holographic memory itself is an extremely robust device even in a space radiation environment, its associated lasers and drive circuit devices are vulnerable. Such vulnerabilities sometimes engendered severe problems that prevent reading of all contents of the holographic memory, which is a turn-off failure mode of a laser array. This paper therefore presents a proposal for a recovery method for the turn-off failure mode of a laser array on a holographic storage system, and describes results of an experimental demonstration. (C) 2011 Optical Society of America

DOI： 10.1364/OE.19.024147

Multi-context optically reconfigurable gate array using a polymer-dispersed liquid crystal holographic memory 査読

Triple module redundancy scheme on an optically reconfigurable gate array 査読

Y. Torigai, M. Watanabe

International SoC Design Conference 250 - 253 2011年11月

R. Moriwaki, M. Watanabe, A. Ogiwara, F. Kobayashi

MICROOPTICS CONFERENCE 1 - 2 2011年11月

Holographic memory formed by multi-context recording for optically reconfigurable gate array 査読

A. Ogiwara, M. Watanabe, F. Kobayashi

17th Microopics Conference (MOC) 1 - 2 2011年11月

Dependable optically reconfigurable gate array with a phase-modulation type holographic memory 査読

Takahiro Watanabe, Minoru Watanabe

2011 21st International Conference on Field Programmable Logic and Applications 34 - 37 2011年9月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

Optically reconfigurable gate arrays (ORGAs) have been developed as a type of multi-context field programmable gate array. An ORGA's programmable gate array can be reconfigured at nanosecond-order, with more than 100 reconfiguration contexts. In addition to that beneficial feature, since ORGAs can be reconfigured with invalid configuration data that have been damaged by high-energy charged particles in a radiation-rich space environment, ORGAs are suitable for space applications. The robust capability of ORGAs with an amplitude modulation type holographic memory has already been demonstrated, but an ORGA with a phase-modulation type holographic memory that can achieve more robust capability has never been reported. Therefore, this paper presents a proposal of a new dependable ORGA architecture based on a phase-modulation type of holographic memory. In addition, this paper describes experimental clarification through a demonstration that the dependable ORGA is more robust than conventional ORGAs with an amplitude modulation type holographic memory. © 2011 IEEE .

DOI： 10.1109/FPL.2011.17

A Four-Context Programmable Optically Reconfigurable Gate Array With a Reflective Silver-Halide Holographic Memory 査読

Shinya Kubota, Minoru Watanabe

IEEE PHOTONICS JOURNAL 3 ( 4 ) 665 - 675 2011年8月

記述言語：英語掲載種別：研究論文（学術雑誌）出版者・発行元：IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC

This paper presents a proposal for a four-context programmable optically reconfigurable gate array (PORGA) with a high-resolution reflective silver-halide holographic memory and a corresponding writer system. The PORGA demonstrates the capability of 4.6-11.5-mu s high-speed configuration context switching among four configuration contexts, which is 1000 times faster than that of conventional field programmable gate arrays (FPGAs).

DOI： 10.1109/JPHOT.2011.2160335

Novel dynamic module multiple redundancy for optically reconfigurable gate arrays

Minoru Watanabe

IEEE International Midwest Symposium on Circuits & Systems 2011年8月

Dynamic reconfiguration on a dynamically reconfigurable vision-chip architecture 査読

A. Gundjalam, M. Watanabe

International Conference on engineering of reconfigurable systems and algorithms 2011年7月

A MEMS writer system embedded for a programmable optically reconfigurable gate array 査読

S. Kubota, M. Watanabe

International Workshop on Highly Efficient Accelerators and Reconfigurable Technologies 130 - 135 2011年6月

Optically reconfigurable gate array with a polymer-dispersed liquid crystal holographic memory 査読

Takayuki Mahuchi, Minoru Watanabe, Akifumi Ogiwara, Fuminori Kobayashi

Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2011 44 - 49 2011年6月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

Optically reconfigurable gate arrays (ORGAs) have been developed as a type of high-fault-tolerance multi-context field programmable gate array for space applications under radiation-rich environments. However, although many configuration contexts can be stored on an ORGA device and can be implemented on its gate array dynamically in an extremely short time, several laser sources are necessary to address the configuration contexts. Since such lasers are always expensive and because such devices are easily damaged by surge current, reducing the number of lasers is an important factor. Therefore, this paper presents a proposal of a new optically reconfigurable gate array with a polymer-dispersed liquid crystal holographic memory. Under the ORGA, all configuration contexts can be addressed by half the number of lasers as there are reconfiguration contexts. This paper presents demonstration results of the optically re-configurable gate array obtained using a polymer-dispersed liquid crystal holographic memory. © 2011 IEEE.

DOI： 10.1109/AHS.2011.5963965

Parallel template matching operations on a dynamically reconfigurable vision-chip architecture 査読

Hironari Nakada, Minora Watanabe, Shoji Kawahito

2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011 205 - 208 2011年6月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

Recently, high-speed image recognition functionality that is superior to the image recognition speed of the human eye is demanded for autonomous vehicles and robots. Currently, such embedded systems comprise a processor and memory. To recognize many images, many template images must be stored in memory and must be sent quickly from memory to the processor. For example, assuming that the system receives an external image with 1 million pixels at every 1 ms and assuming that the system must execute template-matching operations of 1 million template images with the same million pixels within 1 ms, then the transfer speed from the memory to the processor and the processor operation reaches 1 Petapixel/s. Therefore, to realize high-speed template-matching operation, a dynamically reconfigurable vision-chip architecture with a holographic memory and large-bandwidth optical connections has been proposed. Among such researches, this paper presents a proposal of novel parallel template-matching operations performed on the dynamically reconfigurable vision-chip architecture. Furthermore, the advantages of the new method are discussed based on some demonstration results. © 2011 IEEE.

DOI： 10.1109/NEWCAS.2011.5981291