Faculty Profiles - IOKIBE Kengo

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Linear Equivalent Circuit Modeling of Power Converter Circuit for Conducted Disturbance Estimation : Determination of Model Parameters by Use of Dual Port LISN

INOUE Shuhei, IOKIBE Kengo, TOYOTA Yoshitaka, WATANABE Tetsushi

IEICE technical report. Electromagnetic compatibility 2012.6.15 The Institute of Electronics, Information and Communication Engineers

Event date： 2012.6.15

Language：Japanese

A reduction design of conducted disturbance from power converter circuits is becoming more important as electronic devices are requiring much more power efficiency. Conducted disturbance must meet domestic and international regulations. In this paper, a linear equivalent circuit model on the basis of a EMC macro-model of IC/LSI, LECCS model, is investigated to predict the conducted disturbance of power converter circuits. The dual-port LISN (DP-LISN) constructed to provide the model is also reported. In the study, an commercial table-top induction heater is used as the equipment under test. Conducted disturbance voltages were measured with 10 different load pairs of the DP-LISN. Model parameters were then determined by the least square method with the conducted disturbance voltages measured. We simulated conducted disturbance voltages for evaluation by use of the linear equivalent circuit model as an evaluation of the model. As comparing simulated and measured disturbance voltages, the spectrum of the conducted disturbance voltages agreed with each other in their envelopes.

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B-4-29 Identification of Equivalent Current Source of Cryptographic Circuit by Means of LECCS Modeling Method

Okamoto Kaoru, Amano Tetsuo, Iokibe Kengo, Toyota Yoshitaka

Proceedings of the IEICE General Conference 2012.3.6 The Institute of Electronics, Information and Communication Engineers

B-4-10 Linear Equivalent Circuit Modeling of Power Converter Circuit for COnducted Disturbance Reduction Design

Ishiyama Naotaka, Inoue Shuhei, Iokibe Kengo, Toyota Yoshitaka, Watanabe Tetsushi

Proceedings of the IEICE General Conference 2012.3.6 The Institute of Electronics, Information and Communication Engineers

B-4-9 Construction of Dual-Port LISN for Linear Equivalent Circuit Modeling of Power Convert Circuit

Inoue Shuhei, Iokibe Kengo, Toyota Yoshitaka, Watanabe Tetsushi

Proceedings of the IEICE General Conference 2012.3.6 The Institute of Electronics, Information and Communication Engineers

CS-6-6 Circuit Simulation with Modal Equivalent Circuit for Noise Suppression

Toyota Yoshitaka, Iokibe Kengo, Koga Liuji R.

Proceedings of the IEICE General Conference 2012.3.6 The Institute of Electronics, Information and Communication Engineers

Measurement of IC Package Inductance with Transmission Line Embedded in Package

IOKIBE Kengo, TANIMICHI Ayumi, TOYOTA Yoshitaka

2012.1.26 The Institute of Electronics, Information and Communication Engineers

Event date： 2012.1.26

Language：Japanese

It is of importance for designers to possess accurate inductances of IC packages in power integrity(PI) and electromagnetic compatibility designs. The authors had proposed a simple method to measure inductance of IC package that is mounted on a practical printed circuit board. They investigated the method in terms of accuracy here. In the proposed method, a transmission line is embedded in an IC package interested, and two port S parameters of a network composed of a targeted package structure, the transmission line, and the corresponding symmetric package structure is measured. The package inductance is calculated from the measured S parameters and properties of the transmission line obtained beforehand. The proposed method was applied to four test IC packages, and their inductances were measured. The measurement was demonstrated on a commercial electromagnetic simulator, HFSS. The package inductances were also obtained by analyzing the test package directly for comparison to the results of the proposed method. They agreed with the maximum error of 0.9 nH. To understand a cause of the error, the authors investigated effects of dummy-objects that were used to place measuring ports in the HFSS calculation. The dummy-object caused errors less than 0.06 nH, which means it seldom cause significant errors.

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Mode-equivalent Modeling and Identification of System with Cable Interconnection between Transmitter and Receiver Pairs (Part 3)

TOYOTA Yoshitaka, SEJIMA Kota, IOKIBE Kengo, KOGA Liuji R., WATANABE Tetsushi

IEICE technical report. Electromagnetic compatibility 2011.11.25 The Institute of Electronics, Information and Communication Engineers

Event date： 2011.11.25

Language：Japanese

We focus on the expression by using modal equivalent-circuit model. The goal of this study is to clarify the mechanism of the phenomena caused by mode conversion and then find effective measures. The simple model is based on mode-decomposition technique and places mode-conversion sources at the interface where the current division factors of the transmission lines are different. In this study, a simple cable interconnection system with a node and common-mode excitation by a current probe were investigated to evaluate the validity of this study. As a result, both cases agreed well between measurement and circuit simulation with the modal-equivalent circuit model.

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PI/SI解析精度向上を目的としたIBIS及びLECCS-core組合せICマクロモデル

岡典正, 五百旗頭健吾, 豊田啓孝, 古賀隆治

電子情報通信学会論文誌C 2010

CP-2-3 EMC設計を支援する高速EMIシミュレータの開発とその応用(CP-2.マイクロ波教育におけるシミュレータの可能性,パネルセッション,ソサイエティ企画)

豊田啓孝, 古賀隆治, 五百旗頭健吾, 和田修己

電子情報通信学会総合大会講演論文集 2009.3.4

Fast Calculation of Power-Bus Resonances in Printed Circuit Boards by Segmentation Method with Single Slit Segments

HAMAGAMI Takahiro, TOYOTA Yoshitaka, IOKIBE Kengo, KOGA Ryuji

ITE Technical Report 2009 The Institute of Image Information and Television Engineers

Event date： 2009

Language：Japanese

A fast algorithm based on a full cavity-mode resonator model of rectangular power-bus structures is able to quickly obtain the power-bus resonance characteristics in multilayer printed circuit boards (PCBs). Furthermore, the approach can provide the resonance characteristics in PCBs with a slit using a slit model expressing electromagnetic coupling across the gap of the slit. However, the model does not express the slit width, which can cause the degradation in accuracy of resonance analysis. In this paper, a slit segment was studied to express the gap of the single slit coupling and analyze the power-bus resonances. The slit segment was given from an equivalent circuit based on a coupled microstrip line. As a result, it was found that the slit segment can provide the power-bus resonance characteristics as accurate as or more accurate than the conventional slit model.

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黄砂の観測を目的としたインターネットシステム上のレーザレーダ運用

古賀隆治, 五百旗頭健吾, 伊藤嘉則, 白川紘之, 豊田啓孝, 和田修己

計測自動制御学会中国支部学術講演会論文集 2003

岡山・福山における偏光ライダーによる対流圏同時観測

五百旗頭健吾, 香川直己, 豊田啓孝, 和田修己, 古賀隆治

応用物理学会学術講演会講演予稿集 2002

Effect of a rectangular field-stop for the laser rader receiving telescope.

後藤孝規, 五百旗頭健吾, 豊田啓孝, 和田修己, 古賀隆治

電子情報通信学会技術研究報告 2002

メッシュグラウンドを有するプリント配線基板における回転角度に対する差動スキューの評価

王晨宇, 五百旗頭健吾, 豊田啓孝

電子情報通信学会環境電磁工学研究会, EMCJ2017-109, pp. 25-30 2018.3.16

プリント回路基板のガラスクロスに起因する差動スキューを低減する最適配線角度

王晨宇, 五百旗頭健吾, 豊田啓孝

JIEP 第三回超高速・高周波エレクトロニクス実装研究会, Vol.17, No.3, pp. 17-20, 東京都杉並区 2017.12.1

クロックグリッチ掃引によるAES回路の故障利用攻撃耐性判定法

2017年暗号と情報セキュリティシンポジウム (SCIS 2017), 2A3-3 2017

ノイズ源振幅変調による電磁妨害波源デバイス特定法の精度改善

電子情報通信学会環境電磁工学研究会, EMCJ2017-70, pp.35-40 2017

IoT時代における暗号機器への物理的な攻撃に対する安全設計技術

岡山大学知恵の見本市2017 2017

差動線路への周期構造導入によるクロストーク抑制効果の実測による評価

JIEP 第三回超高速・高周波エレクトロニクス実装研究会, Vol.17, No.3, pp. 13-16 2017

低コストな安全設計法実現のためのサイドチャネル波形の信号対雑音比測定法

2017年暗号と情報セキュリティシンポジウム (SCIS 2017), 3C3-1 2017

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