Faculty Profiles - IOKIBE Kengo

Presentations -

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Intensity and Phase Estimation of Far-Field Emission of Individual ICs by Using Noise Source Amplitude Modulation Technique

2019.5.10

PSD手法を用いたビアレス・オープンスタブ型EBG構造の設計

金尾奨, 奥山友貴, 五百旗頭健吾, 豊田啓孝

2019年電子情報通信学会総合大会, B-4-23, p. 243, 東京都新宿区 2019.3

周期構造を有する隣接差動線路間のディファレンシャルモードクロストークの低減メカニズム

王晨宇, 竹田大晃, 五百旗頭健吾, 豊田啓孝

2019年電子情報通信学会総合大会, B-4-14, p. 234, 東京都新宿区 2019.3

差分電力解析におけるサイドチャネル波形のSNRと相関係数の関係式パラメータの実験による同定

手嶋俊彰, 五百旗頭健吾, 豊田啓孝, 矢野佑典

暗号と情報セキュリティシンポジウム (SCIS2019), 2D3-4, 滋賀県大津市 2019.1

Prediction Accuracy in Conduction Disturbance Voltage of DC/DC Buck Converter Using Noise-source Equivalent-circuit Model

2019.4.11

Improvement of Prediction Accuracy by Improving Parameters Extraction in 2-port Noise-source Equivalent Circuit Model of DC/DC Converter

2019.1.18

Investigation of Reaction of Error Control of CAN Protocol in Case of Electromagnetic Disturbance Injection

Ryunosuke Isshiki, Kengo Iokibe, Takuya Kusaka, Tetsushi Kamegawa, Yasuyuki Nogami

EMC Joint Workshop 2018, Daejeon, EMCJ2018-63, pp. 23-28, Daejeon, Korea 2018.11.22

Design of Differential Transmission Lines with Periodic Structure for Crosstalk Suppression by Preference Set-based Design Method (電磁環境マグネティックス合同研究会 EMC一般(EMC Joint Workshop, 2018, Daejon))

Takeda Hiroaki, Iokibe Kengo, Toyota Yoshitaka

電気学会研究会資料. MAG = The papers of technical meeting on magnetics, IEE Japan 2018.11.22 電気学会

Investigation of CAN transceiver and controller response to electromagnetic disturbance by using current injection probe

一色竜之介, 五百旗頭健吾, 日下卓也, 亀川哲志, 野上保之

電気学会研究会資料. EMC = The papers of technical meeting on electromagnetic compatibility, IEE Japan 2018.11.22 電気学会

ノイズ源振幅変調と相関解析に基づく放射源デバイス毎の電磁妨害波放射強度推定

吉野慎平, 石田千晶, 五百旗頭健吾, 豊田啓孝

第32回エレクトロニクス実装学会春季講演大会, 8A3-3, 千葉県野田市 2018.3

AES回路から漏洩するサイドチャネル波形のSNR測定法～バイト毎のラウンド鍵解読への適用～

手嶋俊彰, 五百旗頭健吾, 豊田啓孝, 矢野佑典

暗号と情報セキュリティシンポジウム (SCIS2018), 1D2-2, 新潟市

AES暗号回路の規模増加を抑制するサイドチャネル攻撃対策の検討～HDパワーモデルによる漏洩への対策～

熊野靖也, 矢野佑典, 五百旗頭健吾, 籠谷裕人, 豊田啓孝

暗号と情報セキュリティシンポジウム (SCIS2018), 1D2-1, 新潟市

サイドチャネル攻撃耐性評価コスト削減を目的とした暗号機器へのLC共振器付加

河田直樹, 矢野佑典, 五百旗頭健吾, 豊田啓孝

電子情報通信学会環境電磁工学研究会, EMCJ2017-101, pp. 77-81, 岡山県倉敷市

2重電源層プレーナ型EBG 構造の小型化－単位セルにおけるインダクタンス増加のための細線導入－

林星小雨, 五百旗頭健吾, 豊田啓孝, 金子俊之

電子情報通信学会環境電磁工学研究会, EMCJ2017-95, pp. 43-48, 岡山県倉敷市

ノイズ源振幅変調による電磁妨害波ノイズ源の対策優先度決定及び対策効果の評価

吉野慎平, 石田千晶, 五百旗頭健吾, 豊田啓孝

電子情報通信学会環境電磁工学研究会, EMCJ2017-96, pp. 49-54, 岡山県倉敷市

Reduction in Common-mode Noise Generation by Placing Capacitors at Mode-conversion Positions in Power Distribution Network

2015.5.15

A Vialess Open-stub EBG Structure for Power-bus Noise Reduction

YAMASHITA Yuki, TOYOTA Yoshitaka, IOKIBE Kengo, KONDO Koichi, YOSHIDA Shigeyoshi, KANEKO Toshiyuki

IEICE technical report. Electromagnetic compatibility 2015.1.22 The Institute of Electronics, Information and Communication Engineers

Event date： 2015.1.22

Language：Japanese

Electromagnetic bandgap (EBG) formed by a periodic structure (EBG structure) has been studied for reducing power-bus noise of printed circuit boards. The EBG structure obtains a large amount of noise suppression and is available for separating simultaneous switching noise generated in digital circuits and small rf signal in analog circuits on mixed-signal boards. Many kinds of EBG structures have been so far proposed and can be roughly classified into two types with and without vias. We have focused on Planar EBG structures without vias because they consist of only two layers and cost-effective due to no vias. In contrast, open-stub EBG structure, which is one of EBG structures with vias, is easy to miniaturize its cell size independently of suppression frequency. We considered that the open-stub EBG structure was specialized for the EBG structures with vias. In this report, however, a planer EBG structure with open stub is proposed by inventing a new structure. The effect of power-bus noise reduction is examined by full-wave simulation and validated in the 2.4 GHz band.

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Investigation on Aes Circuites in Information-Leaking-Behavior by Means of Internal Equivalent Current Source

田井伸拓, 五百旗頭健吾, 籠谷裕人, 大西紘之, 前島一仁, 豊田啓孝, 渡辺哲史

電子情報通信学会技術研究報告 2014

Safety Estimates of Cryptographic Modules against On-Board Side-Channel Attacks by Use of EMC Macro-Model

IOKIBE Kengo, AMANO Tetsuo, OKAMOTO Kaoru, TOYOTA Yoshitaka, WATANABE Tetsushi

IEICE technical report. Electromagnetic compatibility 2012.12.14 The Institute of Electronics, Information and Communication Engineers

Event date： 2012.12.14

Language：Japanese

In this study, EMC-macro modeling was examined to develop a method to evaluate cryptographic systems before fabrication. A EMC-macro model of a cryptographic FPGA in which an AES algorithm had been implemented was determined from experimental measurements under the initial configuration of a power distribution network (PDN) of FPGA. The model was implemented into a commercial analog circuit simulator and side-channel traces due to the SSN current was estimated under three different PDN configurations under which a decoupling circuit was inserted into the PDN as a countermeasure. Estimated side-channel traces were analyzed statistically by the correlation power analysis (CPA) method to obtain correlation values, a major security index of AES. Variation of the correlation values with changes in decoupling configuration agreed with the corresponding experimental results. This means that security of cryptographic devices against side-channel attacks can be evaluated by using the equivalent circuit model before fabrication.

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B-4-50 Suppression of Power-bus Resonance by Quarter-wavelength Resonator with Loss

Mahmood Farhan Zaheed, Toyota Yoshitaka, Iokibe Kengo

Proceedings of the Society Conference of IEICE 2012.8.28 The Institute of Electronics, Information and Communication Engineers

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