論文 - 渡邊 誠也
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Evaluation of a Wafer-Scale VLSI Using Programmable Architecture 査読
Atsushi Takata, Minoru Watanabe, Nobuya Watanabe
IEEE 43rd International Conference on Consumer Electronics (ICCE 2025) 2025年1月
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Radiation-Hardened Triple Modular Redundant Serial Communication System Using Triple Communication Lines 査読
Utsuki Sekioka, Minoru Watanabe, Nobuya Watanabe
IEEE 43rd International Conference on Consumer Electronics (ICCE 2025) 2025年1月
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Triple Modular Redundancy Logic Design from High-Level Hardware Description 査読
Nobuya Watanabe, Minoru Watanabe
IEEE 43rd International Conference on Consumer Electronics (ICCE 2025) 2025年1月
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Development of a Radiation-Hardened JTAG Interface for Optically Reconfigurable Gate Arrays 査読
Naoki Nagamine, Minoru Watanabe, Nobuya Watanabe
IEEE 43rd International Conference on Consumer Electronics (ICCE 2025) 2025年1月
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Radiation Degradation Evaluation of the Dynamic Configuration Circuit on an Optically Reconfigurable Gate Array VLSI 査読
Seiji Ohashi, Minoru Watanabe, Nobuya Watanabe
IEEE 43rd International Conference on Consumer Electronics (ICCE 2025) 2025年1月
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Demonstration of a Clock Distribution Method Using Switching Matrices and a Two- Phase Clock Signal on an FPGA 査読
Ayumu Ogura, Minoru Watanabe, Nobuya Watanabe
IEEE 43rd International Conference on Consumer Electronics (ICCE 2025) 2025年1月
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Implementation of Mono Instruction Set Computer with Small Register Files 査読
Soma Imai, Minoru Watanabe, Nobuya Watanabe
IEEE 43rd International Conference on Consumer Electronics (ICCE 2025) 2025年1月
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Triple modular redundant RISC-V processor on a Cyclone V FPGA 査読
Masato Isobe, Minoru Watanabe, Nobuya Watanabe
International Topical Workshop on Fukushima-Daiichi Decommissioning Research 2024 2024年10月
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Triple modular redundant serial communication circuit used in a severe radiation environment 査読
Utsuki Sekioka, Minoru Watanabe, Nobuya Watanabe
International Topical Workshop on Fukushima-Daiichi Decommissioning Research 2024 2024年10月
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A ring oscillator implementation onto an optically reconfigurable gate array VLSI 査読
Shintaro Takatsuki, Minoru Watanabe, Nobuya Watanabe
International Topical Workshop on Fukushima-Daiichi Decommissioning Research 2024 2024年10月
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Clock distribution exploiting switching matrices on an optically reconfigurable gate array 査読
Ayumu Ogura, Minoru Watanabe, Nobuya Watanabe
International Topical Workshop on Fukushima-Daiichi Decommissioning Research 2024 2024年10月
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Implementation of a Mono Instruction Set Computer on a radiation-hardened optically reconfigurable gate array 査読
Soma Imai, Minoru Watanabe, Nobuya Watanabe
International Topical Workshop on Fukushima-Daiichi Decommissioning Research 2024 2024年10月
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A 4-bit counter implementation on a repairable FPGA 査読
Ryota Hosoya, Minoru Watanabe, Nobuya Watanabe
International Topical Workshop on Fukushima-Daiichi Decommissioning Research 2024 2024年10月
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Optically reconfigured gate array VLSI with a triple-modular redundant optical configuration circuit 査読
Kiyoto Yonechi, Minoru Watanabe, Nobuya Watanabe
International Topical Workshop on Fukushima-Daiichi Decommissioning Research 2024 2024年10月
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Realization of a huge-scale radiation-hardened optically reconfigurable gate array VLSI 査読
Atsushi Takata, Minoru Watanabe, Nobuya Watanabe
International Topical Workshop on Fukushima-Daiichi Decommissioning Research 2024 2024年10月
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Ring oscillator based clock generation for a radiation-hardened optically reconfigurable gate array VLSI 査読
Shintaro Takatsuki, Minoru Watanabe, Nobuya Watanabe
2024 IEEE 37th International System-on-Chip Conference (SOCC) 2024年9月
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Holographic memory optimization method for an Optically reconfigurable gate array
Takumi Fukumoto, Minoru Watanabe, Nobuya Watanabe
The 8th International Forum on the Decommissioning of the Fukushima Daiichi Nuclear Station 2024年8月
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A triple modular redundant RISC-V processor on a Cyclone V FPGA
Masato Isobe, Minoru Watanabe, Nobuya Watanabe
RISC-V Day Tokyo 2024 Summer 2024年8月
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Voltage Range Evaluation of An Optically Reconfigurable Gate Array VLSI 査読
Yuki Shimamura, Minoru Watanabe, Nobuya Watanabe
2024 IEEE 35th International Conference on Application-specific Systems, Architectures and Processors (ASAP) 239 - 240 2024年7月
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Wafer Scale VLSI Realization Using Programmable Architecture 査読
Atsushi Takata, Minoru Watanabe, Nobuya Watanabe
IEEE 42nd International Conference on Consumer Electronics (ICCE 2024) 205 - 206 2024年1月