論文 - 渡邊 誠也
-
Evaluation of a Wafer-Scale VLSI Using Programmable Architecture 査読
Atsushi Takata, Minoru Watanabe, Nobuya Watanabe
IEEE 43rd International Conference on Consumer Electronics (ICCE 2025) 2025年1月
-
Radiation-Hardened Triple Modular Redundant Serial Communication System Using Triple Communication Lines 査読
Utsuki Sekioka, Minoru Watanabe, Nobuya Watanabe
IEEE 43rd International Conference on Consumer Electronics (ICCE 2025) 2025年1月
-
Triple Modular Redundancy Logic Design from High-Level Hardware Description 査読
Nobuya Watanabe, Minoru Watanabe
IEEE 43rd International Conference on Consumer Electronics (ICCE 2025) 2025年1月
-
Development of a Radiation-Hardened JTAG Interface for Optically Reconfigurable Gate Arrays 査読
Naoki Nagamine, Minoru Watanabe, Nobuya Watanabe
IEEE 43rd International Conference on Consumer Electronics (ICCE 2025) 2025年1月
-
Radiation Degradation Evaluation of the Dynamic Configuration Circuit on an Optically Reconfigurable Gate Array VLSI 査読
Seiji Ohashi, Minoru Watanabe, Nobuya Watanabe
IEEE 43rd International Conference on Consumer Electronics (ICCE 2025) 2025年1月
-
Demonstration of a Clock Distribution Method Using Switching Matrices and a Two- Phase Clock Signal on an FPGA 査読
Ayumu Ogura, Minoru Watanabe, Nobuya Watanabe
IEEE 43rd International Conference on Consumer Electronics (ICCE 2025) 2025年1月
-
Implementation of Mono Instruction Set Computer with Small Register Files 査読
Soma Imai, Minoru Watanabe, Nobuya Watanabe
IEEE 43rd International Conference on Consumer Electronics (ICCE 2025) 2025年1月
-
Triple modular redundant RISC-V processor on a Cyclone V FPGA 査読
Masato Isobe, Minoru Watanabe, Nobuya Watanabe
International Topical Workshop on Fukushima-Daiichi Decommissioning Research 2024 2024年10月
-
Triple modular redundant serial communication circuit used in a severe radiation environment 査読
Utsuki Sekioka, Minoru Watanabe, Nobuya Watanabe
International Topical Workshop on Fukushima-Daiichi Decommissioning Research 2024 2024年10月
-
A ring oscillator implementation onto an optically reconfigurable gate array VLSI 査読
Shintaro Takatsuki, Minoru Watanabe, Nobuya Watanabe
International Topical Workshop on Fukushima-Daiichi Decommissioning Research 2024 2024年10月
-
Clock distribution exploiting switching matrices on an optically reconfigurable gate array 査読
Ayumu Ogura, Minoru Watanabe, Nobuya Watanabe
International Topical Workshop on Fukushima-Daiichi Decommissioning Research 2024 2024年10月
-
Implementation of a Mono Instruction Set Computer on a radiation-hardened optically reconfigurable gate array 査読
Soma Imai, Minoru Watanabe, Nobuya Watanabe
International Topical Workshop on Fukushima-Daiichi Decommissioning Research 2024 2024年10月
-
A 4-bit counter implementation on a repairable FPGA 査読
Ryota Hosoya, Minoru Watanabe, Nobuya Watanabe
International Topical Workshop on Fukushima-Daiichi Decommissioning Research 2024 2024年10月
-
Optically reconfigured gate array VLSI with a triple-modular redundant optical configuration circuit 査読
Kiyoto Yonechi, Minoru Watanabe, Nobuya Watanabe
International Topical Workshop on Fukushima-Daiichi Decommissioning Research 2024 2024年10月
-
Realization of a huge-scale radiation-hardened optically reconfigurable gate array VLSI 査読
Atsushi Takata, Minoru Watanabe, Nobuya Watanabe
International Topical Workshop on Fukushima-Daiichi Decommissioning Research 2024 2024年10月
-
Ring oscillator based clock generation for a radiation-hardened optically reconfigurable gate array VLSI 査読
Shintaro Takatsuki, Minoru Watanabe, Nobuya Watanabe
2024 IEEE 37th International System-on-Chip Conference (SOCC) 2024年9月
-
Holographic memory optimization method for an Optically reconfigurable gate array
Takumi Fukumoto, Minoru Watanabe, Nobuya Watanabe
The 8th International Forum on the Decommissioning of the Fukushima Daiichi Nuclear Station 2024年8月
-
A triple modular redundant RISC-V processor on a Cyclone V FPGA
Masato Isobe, Minoru Watanabe, Nobuya Watanabe
RISC-V Day Tokyo 2024 Summer 2024年8月
-
Voltage Range Evaluation of An Optically Reconfigurable Gate Array VLSI 査読
Yuki Shimamura, Minoru Watanabe, Nobuya Watanabe
2024 IEEE 35th International Conference on Application-specific Systems, Architectures and Processors (ASAP) 239 - 240 2024年7月
-
Wafer Scale VLSI Realization Using Programmable Architecture 査読
Atsushi Takata, Minoru Watanabe, Nobuya Watanabe
IEEE 42nd International Conference on Consumer Electronics (ICCE 2024) 205 - 206 2024年1月
-
Application Design System for High-Speed Dynamically Reconfigurable Gate Arrays 査読
Nobuya Watanabe, Ryoya Ishitani, Minoru Watanabe
IEEE 42nd International Conference on Consumer Electronics (ICCE 2024) 1480 - 1485 2024年1月
-
Remote Monitoring System for Optically Reconfigurable Gate Arrays Under Radiation Environments 査読
Utsuki Sekioka, Minoru Watanabe, Nobuya Watanabe
IEEE 42nd International Conference on Consumer Electronics (ICCE 2024) 907 - 908 2024年1月
-
Parallel Configuration Experiment for a Radiation-Hardened Optically Reconfigurable Gate Array with a Holographic Polymer-Dispersed Liquid Crystal Memory 査読
Sae Goto, Minoru Watanabe, Akifumi Ogiwara, Nobuya Watanabe
IEEE 42nd International Conference on Consumer Electronics (ICCE 2024) 905 - 906 2024年1月
-
Optical multi-context scrubbing operation on a redundant system 査読
Kakeru Ando, Minoru Watanabe, Nobuya Watanabe
Optics Express 31 ( 23 ) 38529 - 35539 2023年10月
-
An optically reconfigurable gate array VLSI driven by an unstabilized power supply unit 査読
Masashi Tsujino, Minoru Watanabe, Nobuya Watanabe
2023 IEEE 36th International System-on-Chip Conference (SOCC) 2023年9月
-
Total-ionizing-dose tolerance of an optically reconfigurable gate array VLSI
Kaho Yamada, Minoru Watanabe, Nobuya Watanabe
The seventh International Forum on the Decommissioning of the Fukushima Daiichi Nuclear Power Plant 2023年8月
-
A mono instruction set computer architecture on an optically reconfigurable gate array VLSI
Soma Imai, Minoru Watanabe, Nobuya Watanabe
The seventh International Forum on the Decommissioning of the Fukushima Daiichi Nuclear Power Plant 2023年8月
-
Remote monitoring system used in a severe radiation environment
Utsuki Sekioka, Minoru Watanabe, Nobuya Watanabe
The seventh International Forum on the Decommissioning of the Fukushima Daiichi Nuclear Power Plant 2023年8月
-
Photodiode current range measurement result of an optically reconfigurable gate array VLSI
Sae Goto, Minoru Watanabe, Nobuya Watanabe
The seventh International Forum on the Decommissioning of the Fukushima Daiichi Nuclear Power Plant 2023年8月
-
Realization of a wafer-scale VLSI by using optically reconfigurable gate array architecture
Atsushi Takata, Minoru Watanabe, Nobuya Watanabe
The seventh International Forum on the Decommissioning of the Fukushima Daiichi Nuclear Power Plant 2023年8月
-
Sequential circuit implementation onto optically reconfigurable gate array VLSI using a ring oscillator
Shintaro Takatsuki, Minoru Watanabe, Nobuya Watanabe
The seventh International Forum on the Decommissioning of the Fukushima Daiichi Nuclear Power Plant 2023年8月
-
Evaluation of low-voltage operations of an optically reconfigurable gate array VLSI
Yuki Shimamura, Minoru Watanabe, Nobuya Watanabe
The seventh International Forum on the Decommissioning of the Fukushima Daiichi Nuclear Power Plant 2023年8月
-
Design example of a triple modular redundancy ALU, a register file, and a program counter for a processor
Masato Isobe, Minoru Watanabe, Nobuya Watanabe
The seventh International Forum on the Decommissioning of the Fukushima Daiichi Nuclear Power Plant 2023年8月
-
An optically reconfigurable gate array driven by an unstabilized power supply unit
Masashi Tsujino, Minoru Watanabe, Nobuya Watanabe
The seventh International Forum on the Decommissioning of the Fukushima Daiichi Nuclear Power Plant 2023年8月
-
Multi-context-scrubbing operation for a 1-bit counter circuit 査読
Kakeru Ando, Minoru Watanabe, Nobuya Watanabe
2023 21st IEEE Interregional NEWCAS Conference (NEWCAS) 2023年6月
-
Design example of a triple modular redundancy ALU and register-file for RISC-V processors
Masato Isobe, Minoru Watanabe, Nobuya Watanabe
RISC-V Days Tokyo 2023 Summer conference 2023年6月
-
Multi-context optically reconfigurable gate array system used for fast-neutron experiments 査読
Sae Goto, Kakeru Ando, Kaho Yamada, Minoru Watanabe, Nobuya Watanabe, Makoto Kobayashi, Mitsutaka Isobe, Kunihiro Ogawa, Shingo Tamaki, Isao Murata, Sachie Kusaka
16TH IEEE DALLAS CIRCUITS AND SYSTEMS CONFERENCE 2023年4月
-
Total-Ionizing-Dose Tolerance Analysis of a Radiation-Hardened Image Sensor 査読
Daisuke Bamba, Minoru Watanabe, Nobuya Watanabe
2023 IEEE International Conference on Consumer Electronics (ICCE) 2023年1月
-
Optically reconfigurable gate array VLSI that can support a perfect parallel configuration 査読
Sae Goto, Minoru Watanabe, Nobuya Watanabe
18th IEEE Asia Pacific Conference on Circuits and Systems 2022年11月
-
Total Dose Tolerance Analysis of an Optically Reconfigurable Gate Array VLSI 査読
Kaho Yamada, Takeshi Okazaki, Minoru Watanabe, Nobuya Watanabe
IEEE International Conference on Electronics Circuits and Systems 2022年10月
-
Total-ionizing-dose tolerance of an optically reconfigurable gate array VLSI
Kaho Yamada, Takeshi Okazaki, Minoru Watanabe, Nobuya Watanabe
The sixth International Forum on the Decommissioning of the Fulushima Daiichi Nuclear Power Plant 2022年8月
-
Optically reconfigurable gate array VLSI without any common signal
Sae Goto, Minoru Watanabe, Nobuya Watanabe
The sixth International Forum on the Decommissioning of the Fulushima Daiichi Nuclear Power Plant 2022年8月
-
Convolutional neural network implementation using Vitis AI 査読
Akihiko Ushiroyama, Minoru Watanabe, Nobuya Watanabe, Akira Nagoya
Proc. of the IEEE 12th Annual Computing and Communication Workshop and Conference (CCWC) 365 - 371 2022年1月
-
SMTプロセッサにおける命令発行時間に基づくフェッチポリシ 査読
長江忠直, 植原陽平, 渡邊誠也
先進的計算基盤システムシンポジウム SACSIS2006 論文集 395 - 402 2006年
-
渡邊誠也
電子情報通信学会論文誌 J88-D-I ( 11 ) 1688 - 1695 2005年11月
-
齋藤誠司, 渡邊誠也, 正木亮
電子情報通信学会論文誌 J86-D-I ( 2 ) 108 - 116 2003年2月
-
データ並列言語における通信最適化のためのコード移動手法 査読
渡邊誠也, 湯淺太一
情報処理学会論文誌 40 ( 3 ) 1257 - 1266 1999年3月
-
データ並列言語における擬似ベクトル処理のための実行方式 査読
渡邊誠也, 横山亮, 湯淺太一
情報処理学会論文誌:プログラミング 39 ( SIG1(PRO1) ) 34 - 42 1998年