Faculty Profiles - TOYOTA Yoshitaka

MISC - TOYOTA Yoshitaka

Division display 101 - 120 of about 309 ／ All the affair displays >>

Formulation of Mode Conversion in Differential Transmission Lines with Bend Discontinuity

Keita Takariki, Kengo Iokibe, Yoshitaka Toyota

2015 IEEE ELECTRICAL DESIGN OF ADVANCED PACKAGING AND SYSTEMS SYMPOSIUM 152 - 155 2015

Language：English Publisher：IEEE

This paper formulates mode conversions of transmission and reflection from differential mode to common mode in differential transmission lines with bend discontinuity using a very simple model. The formulae tell us that the mode conversion is caused by not only the path difference in the bend but also the difference between the characteristic impedance and port impedance. The formulae were validated by full-wave simulation under the assumption that effect of the bend region is small and results showed that path difference reduction and impedance matching at the input and output ports are significant in suppressing mode conversion. This suggests that the tightly coupled asymmetrically tapered bend proposed by the authors should be effective for suppressing mode conversion.

DOI： 10.1109/EDAPS.2015.7383689

Electromagnetic Immunity Analysis Using Modal-equivalent Circuit in Cable Interconnection System

Yoshitaka Toyota, Kengo Iokibe, Liuji R. Koga

2015 ASIA-PACIFIC INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (APEMC) 716 - 719 2015

Language：English Publisher：IEEE

Electromagnetic immunity analysis as well as electromagnetic emission analysis is significant for EMC design. In this paper, we apply a modal equivalent-circuit model with mode-conversion sources to electromagnetic immunity analysis in a simple cable interconnection system. The analysis can treat mode conversion caused by discontinuity in multi-conductor transmission line with circuit analysis and has been validated in electromagnetic emission analysis. The approach takes an advantage in less calculation sources and helps get design considerations compared with full-wave simulation. In this paper, common-mode excitation by a current probe in a simple cable interconnection system is investigated for model validation. As a result, it is demonstrated that the circuit analysis with the modal-equivalent circuit model agrees well with the measurement results.

DOI： 10.1109/APEMC.2015.7175388

Conducted Disturbance Estimation of Power Converter Circuits Based on Linear Equivalent Circuit Model for EMI Filter Design

Hiroki Geshi, Kengo Iokibe, Yoshitaka Toyota, Tetsushi Watanabe, trial Technology Center of Okayama Pre

Eighth 2015 Korea-Japan Joint Conference on EMT/EMC/BE (KJJC-2015), P-11, Sendai, Japan 89 - 90 2015

Optically Pumped Alkali-Meta Atomic Magnetometer using Permanent Magnets for AC Magnetic Field Detection

Shuji Taue, Masaru Shinohara, Takayuki Nagaoka, Yoshitaka Toyota, Kazuhiro Fujimori, Hideki Fukano

Eighth 2015 Korea-Japan Joint Conference on EMT/EMC/BE (KJJC-2015), P-15, Sendai, Japan 97 - 98 2015

Security Simulation against Side-Channel Attacks on Advanced Encryption Standard Circuits Based on Equivalent Circuit Model

Kengo Iokibe, Kazuhiro Maeshima, Tetsushi Watanabe, Yoshitaka Toyota

2015 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC) 224 - 229 2015

Language：English Publisher：IEEE

An equivalent circuit model was applied to a cryptographic module to simulate the resistance of the module against side-channel attacks. The cryptographic module involved two fiel programmable gate arrays (FPGAs), on which an Advanced Encryption Standard (AES) circuit was implemented on one of them. The equivalent circuit model proposed in the previous literature was improved in terms of the accuracy of model parameters. Resistance against side-channel attacks was simulated in a more practical configuratio with the improved model than that in the previous work. Resistance was simulated with random plaintexts (input values) to the cryptographic circuit, whereas a biased plaintext set was used to simplify simulation. The simulation was carried out with two decoupling configuration for the power distribution network of the FPGA core that the AES circuit was implemented in. The results obtained from simulation confirme that the equivalent circuit model allowed side-channel resistance to be precisely predicted.

DOI： 10.1109/ISEMC.2015.7256163

Dependence of Power Distribution Network Impedance on Circuits Implemented in Field Programmable Gate Array

Nobuhiro Tai, Kengo Iokibe, Yoshitaka Toyota, Tetsushi Watanabe, trial Technology Center of Okayama Pre

Eighth 2015 Korea-Japan Joint Conference on EMT/EMC/BE (KJJC-2015), P-09, Sendai, Japan 85 - 86 2015

サイドチャネル情報漏洩に寄与が大きいAES回路部の内部電流源に基づく検討

五百旗頭健吾, 田井伸拓, 大西紘之, 籠谷裕人, 豊田啓孝, 渡辺哲史

情報理論とその応用シンポジウム予稿集(CD-ROM) 38th 2015

Flexibility of On-Board RL Snubber for PDN Resonance Damping in terms of Mount Location

IOKIBE Kengo, TOYOTA Yoshitaka

IEICE technical report. Electromagnetic compatibility 114 ( 381 ) 69 - 74 2014.12

Language：Japanese Publisher：The Institute of Electronics, Information and Communication Engineers

RL snubber had been proposed as a method to damp the LC resonance over a power distribution network for digital integrated circuits (ICs). The RL snubber was investigated whether the effect of PDN resonance damping depends on locations at which it was implemented in the surface of a printed circuit board. In this study, RL snubbers was implemented at two locations near and apart from a digital IC on a test board. For each of the two implemented locations, RL snubber was optimized in terms of its component parameters, resistance and inductance. The optimized RL snubbers were applied to damp the PDN resonance reducing the RF power current. It was confirmed according to both circuit simulations and measurements that the two RL snubbers reduced RF power current equally around the resonant frequency, independent on their implemented locations. This means that the RL snubber involves a flexibility of implementation location on a printed circuit board. When you apply an RL snubber to your printed circuit board, you can place it in any room flexibly in response to your design.

Investigation of Position to Install a Capacitor to Power Distribution Network for Suppressing Mode Conversion

MIKURA Toshiki, TOYOTA Yoshitaka, IOKIBE Kengo

IEICE technical report. Electromagnetic compatibility 114 ( 214 ) 5 - 10 2014.9

Language：Japanese Publisher：The Institute of Electronics, Information and Communication Engineers

The discontinuity in multiple transmission line, i.e. the change in cross-sectional structure of the trace causes mode conversion. This suggests that normal-mode noise propagation generate common-mode noise by mode-conversion at the discontinuity and then lead to the electromagnetic interference (EMI). Focusing on power distribution network, rf noise caused by switching in a DC-DC converter is becoming a severe problem and hence it is required to consider how to suppress EMI efficiently. Mode conversion occurs at the discontinuity in transmission line where the common-mode electromotive source is excited in proportion to the normal-mode voltage. Different from the signal trace, a capacitor can be installed to the power distribution network to efficiently reduce normal-mode voltage at high frequency. In this paper, the distance between the installed capacitor and the connector where the discontinuity in transmission line occurs are changed to investigate the reduction of the normal-mode voltage in the vicinity of a connector and its relationship with the reductions of common-mode current and far electric field. As a result, it is found that mode conversion is more suppressed by installing the capacitor near the connector than the DC-DC convertor as a noise source to reduce common-mode current and far electric field.

B-4-42 Fabrication of Tightly Coupled Asymmetrically Tapered Bend in Differential Transmission Lines and Its Evaluation in Mode-conversion Suppression

Kan Shohei, Toyota Yoshitaka, Iokibe Kengo

Proceedings of the Society Conference of IEICE 2014 ( 1 ) 269 - 269 2014.9

Fabrication and Evaluation of Lossy Resonator Filter Consisting of Open Stub Covered with Ferrite Thin Film

TOYOTA Yoshitaka, IOKIBE Kengo, KONDO Koichi, YOSHIDA Shigeyoshi

IEICE technical report. Electromagnetic compatibility 114 ( 135 ) 7 - 12 2014.7

Language：Japanese Publisher：The Institute of Electronics, Information and Communication Engineers

A lossy resonator filter was proposed for suppressing noise propagation in the power-ground plane pair of a printed circuit board (PCB) at high frequencies over 1 GHz. The lossy resonator filter has an advantage of frequency selectivity because the frequency band to suppress noise propagation is specified by changing the resonant frequency of the resonator included. Also, the suppressed noise does not regenerate owing to a loss given to the resonator. In this paper, the lossy resonator filter was fabricated by covering the open stubs with a ferrite thin film on a PCB. Then, its characteristics were verified by evaluating the transmission coefficient through full-wave simulation and measurement using a vector network analyzer. The measurement and simulation results show that the noise in the power bus of the PCB at frequencies over 1 GHz is suppressed. Even in the case that the power bus is inside the board, noise propagation in the power bus was suppressed by connecting the inside ground plane and the ground plane of the lossy resonator filter by vias in order to conduct the noise to the filter.

Comparison of Electromagnetic Injection Configurations in terms of Induced Disturbance Observed near Integrated Circuit on Board

MAESHIMA Kazuhiro, IOKIBE Kengo, WATANABE Tetsushi, TOYOTA Yoshitaka

IEICE technical report. Electromagnetic compatibility 114 ( 129 ) 31 - 36 2014.7

Language：Japanese Publisher：The Institute of Electronics, Information and Communication Engineers

In this paper, the authors observed noise induced by electromagnetic disturbance injection in several experimental configurations. The noise was measured on a printed circuit board (PCB) as voltage variations of DC bias and the clock signal. The noise observation is in the course of understanding how the disturbance is conducted into the PCB in the immunity test. The experimental system here consisted of an electrical fast transient/ burst (EFT/B) generator, a coupler and a PCB implementing FPGAs. A Coupling Decoupling Network (CDN) or a current probe was used as the coupler. Experimental results indicated that positive pulse injection fluctuated the power bias voltage of the FPGA and that noise waveforms were varied with the coupler. The waveform variation with coupler suggested that it changed the input impedance of the experimental system at the EFT/B generator. It is also observed that a grounding vanished an oscillating noise in a constant frequency when the PCB ground was shunted to the system ground.

Investigation on Aes Circuits in Information-Leaking-Behavior by Means of Internal Equivalent Current Source

TAI Nobuhiro, IOKIBE Kengo, KAGOTANI Hiroto, OONISHI Hiroyuki, MAESHIMA Kazuhito, TOYOTA Yoshitaka, WATANABE Tetsushi

IEICE technical report. Electromagnetic compatibility 114 ( 93 ) 13 - 18 2014.6

Language：Japanese Publisher：The Institute of Electronics, Information and Communication Engineers

In our previous study, we identified an internal equivalent current source representing the internal switching current of a cryptographic IC that occurred as the IC operated an encryption operation. Since the internal switching current is the source of information leakage, the internal equivalent current source is expected to be able to be applied to evaluate cryptographic ICs in security of side-channel attack. In this study, we investigated the internal equivalent current source with regard to its behavior as the source of information leakage. The investigation revealed that variance of the switching current varied temporally in a round operation and that the AES circuit with a hiding countermeasure provided information leakage at the moment when the variance was smaller than that in the remaining time period. This suggested that cryptographic circuits can be analyzed of their behavior as the information leakage source according to the internal equivalent current source.

Simulation of Unintentional Radiated Emission with Common-mode Antenna Model Taking into Account Mode Conversion between Normal and Common Modes

WAKADUKI Yuri, TOYOTA Yoshitaka, IOKIBE Kengo, KOGA Liuji R., WATANABE Tetsusi

114 ( 69 ) 29 - 34 2014.5

Language：Japanese Publisher：The Institute of Electronics, Information and Communication Engineers

We have developed a common-mode antenna model for estimating unintentional radiated emission (common-mode radiation) taking into account mode conversion between normal and common modes on a printed circuit board. The common-mode antenna model is a equivalent antenna model with electromotive forces caused by the difference in the imbalance factors of the transmission lines. Normal-mode voltage used for the antenna model is calculated by transmission-line analysis with modal equivalent-circuit models. There is still a problem that the iterative analysis we have proposed provides insufficient accuracy in less iteration and needs more calculation time in more iteration. In this paper, we proposed the simultaneous analysis of the modal equivalent-circuit models. The proposed method provided more accurate result than the conventional one. In particular, the simulation results by the proposed method matched those by the real structure model within an error of 1 dB around the maximum radiation.

Tightly Coupled Asymmetrically Tapered Bend for Suppressing Mode Conversion Generated at Bend in Differential Transmission Lines

KAN Shohei, TOYOTA Yoshitaka, IOKIBE Kengo, WATANABE Tetsushi

IEICE technical report. Electromagnetic compatibility 113 ( 423 ) 27 - 32 2014.1

Language：Japanese Publisher：The Institute of Electronics, Information and Communication Engineers

The bend in a pair of differential lines on printed circuit boards causes the path difference, which leads to the phase difference in signal propagation on each signal line and then results in mode conversion. This paper proposes a bend structure to suppress differential-to-common mode conversion by modifying the tightly coupled tapered bend so that the asymmetrical taper cancels the path difference remained at the tightly coupled bend. As a result, the amount of mode conversion was reduced by approximately 23 dB compared to the symmetrical taper. In addition, the reflect ion on differential mode was reduced by approximately 10 dB because the two-section asymmetrical taper can make the differential-mode characteristic impedance almost constant.

Guard Trace with Periodic Structure Taking Signal Integrity into Account

Yoshitaka Toyota, Kengo Iokibe, Tetsushi Watanabe

2014 IEEE ELECTRICAL DESIGN OF ADVANCED PACKAGING & SYSTEMS SYMPOSIUM (EDAPS) 45 - 48 2014

Language：English Publisher：IEEE

The guard trace is effective for suppressing common-mode generation caused by placing a signal trace too close to the return edge on a printed circuit board. In our previous study, a guard trace with a periodic structure was proposed not only to reduce common-mode radiation but also to maintain signal integrity and was found to be effective. In the current work, the shape of the periodic structure and the termination at both edges to improve the features was investigated through full-wave simulation and measurement from the viewpoint of transmission coefficient as well as far-field radiation. Results show that the smaller the widths of the narrow portion, the further the periodic structure helps reduce common-mode radiation and maintain signal integrity. Also shown is that the periodic guard trace with both ends connected to the return plane is an appropriate structure.

DOI： 10.1109/EDAPS.2014.7030811

Power-bus Noise Reduction Using Ferrite-covered Open Stub in Printed Circuit Board

Yoshitaka Toyota

2014 IEEE CPMT SYMPOSIUM JAPAN (ICSJ) 79 - 82 2014

Language：English Publisher：IEEE

For suppressing the power-bus resonance at higher frequencies, which causes propagation of electromagnetic noise and detraction of power integrity, we proposed a lossy resonator filter with frequency selectivity and low loss. To suppress noise propagation in the power-ground plane pair of a printed circuit board (PCB) at high frequencies (over 1 GHz), a ferrite-covered open stub was formed on a PCB as a lossy resonator filter. Its characteristics were verified by not only full-wave simulation but also measurement using a vector network analyzer. The simulation and measurement results show that the noise in the power bus of the PCB at frequencies over 1 GHz is suppressed. Through a series of investigations focusing on the input impedance characteristics, this paper clarified that low impedance of the open stub around resonant frequency helps prevent the impedance of the power-ground plane pair from increasing due to parallel plate resonances to achieve power-bus noise reduction.

Suppression of noise propagation between power and ground planes using ferrite-plated EBG structure

K. Kondo, S. Yoshida, Y. Toyota

Funtai Oyobi Fummatsu Yakin/Journal of the Japan Society of Powder and Powder Metallurgy 61 S299 - S302 2014

Language：English Publisher：Journal of the Japan Society of Powder and Powder Metallurgy

To confirm the feasibility of suppressing electromagnetic interference (EMI) in the inner layers of multilayered printed wiring boards (PWBs) and sustaining power integrity characteristics, influence of inserting a ferrite-plated thin film between the power and ground planes on the transmission characteristics were evaluated using four types of test boards with the following two conditions: one is the solid test board with a plane copper foil or the EBG (Electromagnetic bandgap) test boards with a one-dimensional lattice-shaped EBG structure consisting of large and small squares 15 mm x 15 mm and 1.5 mm x 1.5 mm in size
the other is whether the 3 or 6 μm-thick ferrite film was deposited or not. The multiple peaks of the transmission coefficient S21 due to parallel plate resonances were observed in the solid test board without ferrite film but the peaks were suppressed over the wide frequency range up to 6 GHz by applying the ferrite film. The EBG test board with the ferrite film provided not only wideband attenuation owing to the ferrite film but also large attenuation in the EBG stopband. The multiple peaks of in the driving point impedance Z11 due to the parallel plate resonances were also successfully suppressed by applying the ferrite film exhibiting favorable power integrity characteristics.

DOI： 10.2497/jjspm.61.S299

Suppression of Mode Conversion by Decreasing Path Difference by using an Asymmetrically Tapered Bend in Differential Transmission Lines

Shohei Kan, Yoshitaka Toyota, Kengo Iokibe, Tetsushi Watanabe

2014 INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, TOKYO (EMC'14/TOKYO) 129 - 132 2014

Language：English Publisher：IEEE

A tightly coupled asymmetrically tapered bend to suppress differential-to-common-mode conversion (caused by bend discontinuity in a pair of differential transmission lines) is proposed. A tightly coupled tapered bend has been proposed to suppress the mode conversion by decreasing the path difference in the bend. The tightly coupled bend with symmetric tapers makes the path difference shorter so that the differential transmission lines are coupled more tightly, but a path difference of twice the line separation still remains. To decrease the remaining path difference, a pair of asymmetric tapers is proposed. A full-wave simulation demonstrated that the amount of differential-to-common-mode conversion was decreased by 29 dB compared to that of the symmetrically tapered bend. To suppress differential-mode reflection, furthermore, a tightly coupled bend with sectionally divided asymmetric tapers is suggested.

Analysis on Equivalent Current Source of AES-128 Circuit for HD Power Model Verification

Kengo Iokibe, Kazuhiro Maeshima, Hiroto Kagotani, Yasuvuki Nogami, Yoshitaka Toyota, Tetsushi Watanabe

2014 INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, TOKYO (EMC'14/TOKYO) 302 - 305 2014

Language：English Publisher：IEEE

We analyzed equivalent current source of cryptographic circuits implemented on a field programmable gate array (FPGA). The equivalent current source represented internal switching current behaviors in the cryptographic circuits during an Advanced Encryption Standard (AES) operation. In this work, the internal current was analyzed for extracting leakage functions and correlation coefficients from scatter diagrams of the Hamming Distance (HD) of AES intermediate values and the current magnitudes. The obtained leakage functions were confirmed a well-known assumption on the HD power model that magnitude of switching current due to transition of register states is proportional to HD of the register. The internal current was also investigated in terms of correlation with the HD model. Correlation coefficients increased as transforming the external power trace in the internal current because two types of noise were reduced by the transform; constant noise and overlap effect of successive rounds. The noise reduction inferred that the use of the internal current source would provide more precise verification of countermeasures.

　 PREV - NEXT 　

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16