Faculty Profiles - TOYOTA Yoshitaka

多電源ピンICのLECCS-coreモデルによる電源電流予測精度の検証

五百旗頭健吾, 東亮太, 津田剛宏, 市川浩司, 中村克己, 豊田啓孝, 古賀隆治, デンソー

電子情報通信学会論文誌C J93-C ( 11 ) 516 - 520 2010

Stopband Characteristics of Planar-type Electromagnetic Bandgap Structure with Ferrite Film

Yoshitaka Toyota, Koichi Kondo, Shigeyoshi Yoshida, Kengo Iokibe, Ryuji Koga

2010 ASIA-PACIFIC INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY & TECHNICAL EXHIBITION ON EMC RF/MICROWAVE MEASUREMENTS & INSTRUMENTATION 664 - 667 2010

Language：English Publisher：IEEE

The noise suppression effect after interposing a ferrite film of several microns in thickness between the power and ground planes is discussed in this paper. In particular, we focused on the combination of a planar electromagnetic bandgap structure with a ferrite film deposited by using spin spray ferrite plating at a low temperature. In this paper, the stopband characteristics are discussed through the use of both simulation and measurement results. First, a full-wave electromagnetic simulation revealed that a test board with a dielectric as thin as a few hundreds of microns has the stopband characteristics of the frequency shift towards the lower frequencies (miniaturization effect) and stopband expansion with the removal of the passband, which was not observed in the case of a thick-dielectric test board. The simulation results also demonstrated that these improvements mainly resulted from the complex permeability of the ferrite film. Next, we found that the measurements are very similar to the simulation results.

Stopband Characteristics of Planar-type Electromagnetic Bandgap Structure with Ferrite Film

Yoshitaka Toyota, Koichi Kondo, Shigeyoshi Yoshida, Kengo Iokibe, Ryuji Koga

2010 ASIA-PACIFIC INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY & TECHNICAL EXHIBITION ON EMC RF/MICROWAVE MEASUREMENTS & INSTRUMENTATION 664 - 667 2010

Language：English Publisher：IEEE

DOI： 10.1109/APEMC.2010.5475608

Application of IC Macro Model (LECCS) to Bypass Circuit Design for Improving EMI/PI Performance

OKA Norimasa, IOKIBE Kengo, TOYOTA Yoshitaka, KOGA Ryuji

IEICE technical report 109 ( 241 ) 141 - 146 2009.10

Language：Japanese Publisher：The Institute of Electronics, Information and Communication Engineers

An IC macro model for power current analysis, called linear equivalent circuit and current source (LECCS) model, is applied to a bypass circuit design. In the bypass circuit design, since requirements to improve electromagnetic interference (EMI) and power integrity (PI) performances are becoming more and more important, improving methods are considered using the LECCS model. The LECCS model, consisting of a linear equivalent circuit and current sources, the former is closely related to EMI performance and the latter is connected to PI performance. Therefore, each idea for better performance is different. Actually examples of bypass circuits based on the idea are shown, and it is verified that the circuits work out by using a SPICE model.

Application of IC Macro Model (LECCS) to Bypass Circuit Design for Improving EMI/PI Performance

OKA Norimasa, IOKIBE Kengo, TOYOTA Yoshitaka, KOGA Ryuji

IEICE technical report 109 ( 242 ) 141 - 146 2009.10

Language：Japanese Publisher：The Institute of Electronics, Information and Communication Engineers

Examination of EMC Macro Model LECCS-I/O with Two Current Sources Simulating Power and Output Currents of CMOS Inverter IC

B-4-56 An Equivalent Circuit Model for Designing of Band-Elimination Filter Formed on Return Plane of Printed Circuit Board

Matsumoto Keisuke, Toyota Yoshitaka, Iokibe Kengo, Koga Ryuji

Proceedings of the Society Conference of IEICE 2009 ( 1 ) 339 - 339 2009.9

TASAKA Tomoya, OKA Norimasa, IOKIBE Kengo, TOYOTA Yoshitaka, KOGA Ryuji

IEICE technical report 109 ( 185 ) 1 - 6 2009.8

Language：Japanese Publisher：The Institute of Electronics, Information and Communication Engineers

In the field of designing printed circuit boards (PCBs), EMC macro-models become increasingly useful to verify EMI performance of PCB with integrated circuits (ICs). This report discussed on estimations of RF currents due to the IC switching by using an IC EMC macro-model, LECCS-I/O, which had been developed to simulate RF power currents of ICs. We focused on not only the RF power current but also the output current of a CMOS I/O gate, since the EMI is caused by RF currents on both power distribution networks and signal lines. We constructed a LECCS-I/O model, with two current sources from measurements and verified the RF currents at power and output pins, comparing to another LECCS-I/O model with a single current source. Results showed that the both models estimate the power current with errors less than 5dB compared to measurements up to 500MHz. Considering the output current, the two-sources model also predicted accurately up to 500MHz, while the single-source model increased errors.

Evaluation of EMI Reduction Effect of Guard Traces Based on Imbalance Difference Model

Tohlu Matsushima, Tetsushi Watanabe, Yoshitaka Toyota, Ryuji Koga, Osami Wada

IEICE TRANSACTIONS ON COMMUNICATIONS E92B ( 6 ) 2193 - 2200 2009.6

Language：English Publisher：IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG

Placing a guard trace next to a signal line is the conventional technique for reducing the common-mode radiation from a printed circuit board. In this paper, the suppression of common-mode radiation from printed circuit boards having guard traces is estimated and evaluated using the imbalance difference model, which was proposed by the authors. To reduce common-mode radiation further, a procedure for designing a transmission line with guard traces is proposed. Guard traces connected to a return plane through vias are placed near a signal line and they decrease a current division factor (CDF). The CDF represents the degree of imbalance of a transmission line, and a common-mode electromotive force depends on the CDF Thus, by calculating the CDF, we can estimate the reduction in common-mode radiation. It is reduced not only by placing guard traces, but also by narrowing the signal line to compensate for the variation in characteristic impedance due to the guard traces. Experimental results showed that the maximum reduction in common-mode radiation was about 14 dB achieved by placing guard traces on both sides of the signal line, and the calculated reduction agreed with the measured one within 1 dB. According to the CDF and characteristic impedance calculations, common-mode radiation can be reduced by about 25 dB while keeping the characteristic impedance constant by changing the gap between the signal line and the guard trace and by narrowing the width of the signal line.

DOI： 10.1587/transcom.E92.B.2193

Increase of Common-Mode Radiation due to Guard Trace Voltage and Determination of Effective Via-Location

Tohlu Matsushima, Tetsushi Watanabe, Yoshitaka Toyota, Ryuji Koga, Osami Wada

IEICE TRANSACTIONS ON COMMUNICATIONS E92B ( 6 ) 1929 - 1936 2009.6

Language：English Publisher：IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG

A guard trace placed near a signal line reduces common-mode radiation front a printed circuit board. The reduction effect is evaluated by the imbalance difference model, which was proposed by the authors, when the guard trace has exactly the same potential as the return plane. However, depending on interval of ground connection of the guard trace, the radiation can increase when the guard trace resonates. In this paper, the authors show that the increase of radiation is caused by the common mode, and extend the imbalance difference model to explain a mechanism of increase of common-mode radiation. Additionally, the effective via location of the guard trace is proposed to reduce the number of vias. The guard trace voltage due to the resonance excites the common mode at the interface where the cross-sectional structure of the transmission line changes since the common-mode excitation is expressed by the product of the voltage and the difference of current division factors. To suppress the common-mode excitation, the guard trace should be grounded at the point where the cross-sectional structure changes. As a result, the common-mode radiation decreases even when the guard trace resonates.

DOI： 10.1587/transcom.E92.B.1929

Effect of Reducing Electromagnetic Noise between Power/Ground Planes with an EBG Pattern on Applying Noise Suppression Sheets

YANO Seiji, TOYOTA Yoshitaka, IOKIBE Kengo, KOGA Ryuji, KONDO Koichi, YOSHIDA Shigeyoshi

IEICE technical report 109 ( 18 ) 7 - 12 2009.4

Language：Japanese Publisher：The Institute of Electronics, Information and Communication Engineers

Applying the electromagnetic bandgap (EBG) structure to power/ground planes of printed circuit boards (PCBs) helps prevent electromagnetic waves from propagating between them at frequencies of interest. We experimentally demonstrated that interposing noise suppression sheet (NSS) into power bus of PCBs is effective for not only miniaturizing the EBG structure but also expanding the stopband towards higher frequencies. This paper clarifies the mechanism of the phenomenon that appears when applying the NSS to the power bus. To distinguish the effects due to permittivity and permeability of the NSS, the S-parameter measurement with the strong magnetic field applied was carried out. The measurement results showed the stopband shift towards lower frequencies results from the effect of the anisotoropic permittivity of the NSS on the electric field around the slit of the EBG pattern. The phenomenon was validated by the full-wave simulation by Microwave Studio. Also, an effective approach of applying the NSS to the EBG pattern was experimentally investigated.

Effect of Frequency Step on Uncertainty of Measurement by Site VSWR Method

WATANABE Tetsushi, TOYOTA Yoshitaka, IOKIBE Kengo, KOGA Ryuji

IEICE technical report 109 ( 18 ) 1 - 6 2009.4

Language：Japanese Publisher：The Institute of Electronics, Information and Communication Engineers

EMI measurement over 1GHz must be operated in a free-space, open area test site. The validation method of free-space condition is called "Site Voltage Standing-wave Ratio" method, which is standardized by CISPR 16-1-4. The standard defines a new procedure for validation of EMC test sites by the ratio of maximum and minimum of transmitted voltages measured at the only 6 locations within a range of 400mm length. The small number of measurement points can cause larger uncertainty. Although the standard requires the measurement at a frequency interval of 50MHz or less, the measurement is usually performed at the largest frequency interval of 50MHz. In this paper, we propose a new approach to reduce the measurement uncertainty with a narrower frequency interval. The approach was validated by measurement as well as simulation. Also the approach was found to reduce the uncertainty caused by the location error in the measurement setup.