Updated on 2022/10/01

写真a

 
TOYOTA Yoshitaka
 
Organization
Faculty of Natural Science and Technology Professor
Position
Professor
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Degree

  • Doctor of Engineering ( Kyoto University )

Research Interests

  • 環境電磁工学

  • Electromagnetic Compatibility

  • Optoelectronics

  • 光電子工学

  • レーザ計測工学

  • Laser Metrology

Research Areas

  • Manufacturing Technology (Mechanical Engineering, Electrical and Electronic Engineering, Chemical Engineering) / Communication and network engineering

  • Manufacturing Technology (Mechanical Engineering, Electrical and Electronic Engineering, Chemical Engineering) / Measurement engineering

  • Nanotechnology/Materials / Optical engineering and photon science

Education

  • Kyoto University   工学研究科   電子工学

    - 1996

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    Country: Japan

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  • Kyoto University    

    - 1996

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  • Okayama University    

    - 1991

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  • Okayama University   工学部   電気電子工学

    - 1991

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    Country: Japan

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Research History

  • - 岡山大学自然科学研究科 教授

    2014

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  • - Professor,Graduate School of Natural Science and Technology,Okayama University

    2014

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  • Associate Professor,Graduate School of Natural Science and Technology,Okayama University

    2008 - 2014

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  • 岡山大学自然科学研究科 准教授

    2008 - 2014

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Professional Memberships

 

Papers

  • A Study for Low Calculation Cost Side-Channel Resistance Prediction Based on Transfer Impedance of Leakage Path Reviewed

    Kengo Iokibe, Masaki Himuro, Yoshitaka Toyota

    2021 Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC)   2021.9

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    Authorship:Last author   Publishing type:Research paper (international conference proceedings)   Publisher:IEEE  

    DOI: 10.1109/apemc49932.2021.9597127

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  • An Approach to Predicting Conducted Noise from DC-DC Converter Accounting for Switching Fluctuation Reviewed

    Shuqi Zhang, Kengo Iokibe, Yoshitaka Toyota

    2021 Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC)   2021.9

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    Authorship:Last author, Corresponding author   Language:English   Publishing type:Research paper (international conference proceedings)   Publisher:IEEE  

    DOI: 10.1109/apemc49932.2021.9596844

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  • Noise-Source Parameter Identification Considering Switching Fluctuation of DC-DC Converter Reviewed

    Shuqi Zhang, Taishi Uematsu, Kengo Iokibe, Yoshitaka Toyota

    2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium   186   2021.7

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    Authorship:Last author, Corresponding author   Language:English   Publishing type:Research paper (international conference proceedings)   Publisher:IEEE  

    This paper proposes noise-source parameter identification of the noise-source equivalent-circuit model for predicting conducted noise while considering the switching fluctuation of a DC/DC converter. We decomposed measured conducted noise into ripple noise, turn-on spike noise, and turn- off spike noise to prevent the accuracy degradation in the parameter identification. The predicted conducted noise spectra show the error with the measurement was within 3 dB up to 200 MHz, which is more accurate than that in our previous study.

    DOI: 10.1109/emc/si/pi/emceurope52599.2021.9559182

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  • Efficient Estimation of Noise Suppression Amount in Power Bus with Decoupling Capacitors Using Lossy Resonator Filters Reviewed

    Sho Kanao, Kengo Iokibe, Yoshitaka Toyota

    2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium   323   2021.7

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    Authorship:Last author, Corresponding author   Language:English   Publishing type:Research paper (international conference proceedings)   Publisher:IEEE  

    To estimate the amount of noise suppressed by lossy resonator filters (LRFs) in a power bus with a decoupling capacitor, we used an equivalent circuit model considering the effect of the capacitor to know the suppression mechanism using the LRF. The discrepancy between the model and a full-wave simulation was approximately 2 dB.

    DOI: 10.1109/emc/si/pi/emceurope52599.2021.9559213

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  • Practical Design Methodology of Mode-Conversion-Free Tightly Coupled Asymmetrically Tapered Bend for High-Density Differential Wiring Reviewed

    Chenyu WANG, Kengo IOKIBE, Yoshitaka TOYOTA

    IEICE Transactions on Communications   E104.B ( 3 )   304 - 311   2021.3

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    Authorship:Last author, Corresponding author   Language:English   Publishing type:Research paper (scientific journal)   Publisher:Institute of Electronics, Information and Communications Engineers (IEICE)  

    <p>The plain bend in a pair of differential transmission lines causes a path difference, which leads to differential-to-common mode conversion due to the phase difference. This conversion can cause serious common-mode noise issues. We previously proposed a tightly coupled asymmetrically tapered bend to suppress forward differential-to-common mode conversion and derived the constraint conditions for high-density wiring. To provide sufficient suppression of mode conversion, however, the additional correction was required to make the effective path difference vanish. This paper proposes a practical and straightforward design methodology by using a very tightly coupled bend (decreasing the line width and the line separation of the tightly coupled bend). Full-wave simulations below 20GHz demonstrated that sufficient suppression of the forward differential-to-common mode conversion is successfully achieved as designed. Measurements showed that our design methodology is effective.</p>

    DOI: 10.1587/transcom.2020ebp3056

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  • Evaluation of Side-Channel Leakage Simulation by Using EMC Macro-Model of Cryptographic Devices Reviewed

    Yusuke YANO, Kengo IOKIBE, Toshiaki TESHIMA, Yoshitaka TOYOTA, Toshihiro KATASHITA, Yohei HORI

    IEICE Transactions on Communications   E104.B ( 2 )   178 - 186   2021.2

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    Language:English   Publishing type:Research paper (scientific journal)   Publisher:Institute of Electronics, Information and Communications Engineers (IEICE)  

    <p>Side-channel (SC) leakage from a cryptographic device chip is simulated as the dynamic current flowing out of the chip. When evaluating the simulated current, an evaluation by comparison with an actual measurement is essential; however, it is difficult to compare them directly. This is because a measured waveform is typically the output voltage of probe placed at the observation position outside the chip, and the actual dynamic current is modified by several transfer impedances. Therefore, in this paper, the probe voltage is converted into the dynamic current by using an EMC macro-model of a cryptographic device being evaluated. This paper shows that both the amplitude and the SC analysis (correlation power analysis and measurements to disclosure) results of the simulated dynamic current were evaluated appropriately by using the EMC macro-model. An evaluation confirms that the shape of the simulated current matches the measured one; moreover, the SC analysis results agreed with the measured ones well. On the basis of the results, it is confirmed that a register-transfer level (RTL) simulation of the dynamic current gives a reasonable estimation of SC traces.</p>

    DOI: 10.1587/transcom.2020ebp3015

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  • Suppression of Mode Conversion at Ethernet Connector by using Modal-Equivalent Circuit Model based on Imbalance Matching Reviewed

    Md. Ashraful Islam, Kengo Iokibe, Yoshitaka Toyota

    IEEJ Transactions on Fundamentals and Materials   140 ( 12 )   586 - 592   2020.12

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    Authorship:Last author, Corresponding author   Language:English   Publishing type:Research paper (scientific journal)   Publisher:Institute of Electrical Engineers of Japan (IEE Japan)  

    <p>When a shielded-twisted-pair (STP) cable is connected with a printed circuit board (PCB) via an Ethernet (RJ45) connector, mode conversion between primary- and secondary-common modes occurs at the connector section due to their structural difference that causes the difference in the imbalance factor of the transmission line. In this paper, we investigate the suppression of the mode conversion at the connector section by using a modal-equivalent circuit model based on imbalance matching. We focus on improving the PCB pattern below the shielded Ethernet connector by placing a copper layer on the PCB surface, and the inadequate shielding at the connector section by soldering and wrapping with copper tape. The application of this improvement based on imbalance matching at the connector section makes the imbalance factor of the connector section closer to that of the cable section and results in the suppression of the mode conversion. Based on the concept of imbalance matching, we confirmed the effect of the shield-improved connector with an improved PCB pattern on the suppression of the mode conversion at the connector section through circuit simulation and measurement, and it was validated that the circuit simulation results obtained from the modal-equivalent circuit model agree well with the measurement results.</p>

    DOI: 10.1541/ieejfms.140.586

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  • Preliminary Investigation of Impedance Discontinuity Detection on Wire Network Using Sequence Time Domain Reflectometry Reviewed

    Daiki Kameyama, Kengo Iokibe, Yoshitaka Toyota

    2020 International Symposium on Electromagnetic Compatibility - EMC EUROPE   2020.9

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    Authorship:Last author, Corresponding author   Language:English   Publishing type:Research paper (international conference proceedings)   Publisher:IEEE  

    DOI: 10.1109/emceurope48519.2020.9245855

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  • Two-port Noise Source Equivalent Circuit Model for DC/DC Buck Converter with Consideration of Load Effect Reviewed

    Shuqi Zhang, Taishi Uematsu, Kengo Iokibe, Yoshitaka Toyota

    2020 International Symposium on Electromagnetic Compatibility - EMC EUROPE   2020.9

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    As the conducted disturbance of a power converter changes with its load value, the relationship between the electromagnetic interference of the power converter and its load needs to be investigated. This work examines a 2-port equivalent circuit model for a DC/DC buck converter with consideration of the load effect. Factors that influence the model accuracy are also discussed. We used a synchronous buck converter operating under a continuous conduction mode condition to determine the load effect and evaluate the model. Results showed that the input port of the fixed-load model and load-variable model had good accuracy up to 70 MHz. We also predicted the load effect on input port noise and found that the input port noise of an 8.2-? load could be predicted from the other two load values (6.6 ? and 11.6 ?).

    DOI: 10.1109/emceurope48519.2020.9245680

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  • Suppression of Mode Conversion Due to Asymmetric Geometry of Dense Parallel Traces in Differential-Transmission Lines Reviewed

    Tomoya Takeuchi, Kengo Iokibe, Yoshitaka Toyota

    2020 International Symposium on Electromagnetic Compatibility - EMC EUROPE   2020.9

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    Symmetry is important for differential-transmission lines, but the dense parallel traces easily break the symmetry due to coupling with the adjacent conductor, leading to mode conversion. We propose an asymmetric geometry of differential-transmission lines placed on the side of a nonadjacent conductor to suppress mode conversion and maintain signal integrity in the cases of loosely coupled and tightly coupled parallel traces. By designing the asymmetric geometry of dense differential-transmission lines by taking into account coupling with the adjacent conductor, mode conversion was successfully suppressed by decreasing the line width on the side of the non-adjacent conductor. It was also found that the asymmetric geometry can suppress mode conversion and maintain signal integrity in tightly coupled parallel traces. In loosely coupled parallel traces, on the other hand, the tightly coupled asymmetrically tapered bend we previously proposed suppresses mode conversion.

    DOI: 10.1109/emceurope48519.2020.9245880

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  • Estimation of Power-bus Noise Suppression by Lossy Resonator Filter Using Lumped-constant Multi-ports Equivalent Circuit Model Reviewed

    Sho Kanao, Kengo Iokibe, Yoshitaka Toyota

    2020 IEEE International Symposium on Electromagnetic Compatibility & Signal/Power Integrity (2020 IEEE EMC+SIPI)   2020.8

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  • A Study on Evaluation Board Requirements for Assessing Vulnerability of Cryptographic Modules to Side-Channel Attacks Reviewed

    Kengo Iokibe, Tomonobu Kan, Yoshitaka Toyota

    2020 IEEE International Symposium on Electromagnetic Compatibility & Signal/Power Integrity (EMCSI)   2020.7

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    Publishing type:Research paper (international conference proceedings)   Publisher:IEEE  

    DOI: 10.1109/emcsi38923.2020.9191655

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  • Mitigating differential skew by rotating meshed ground for high-density layout in flexible printed circuits Reviewed

    Chenyu Wang, Kengo Iokibe, Yoshitaka Toyota

    IEICE Electronics Express   17 ( 10 )   20200101 - 20200101   2020.5

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    Authorship:Last author, Corresponding author   Language:English   Publishing type:Research paper (scientific journal)   Publisher:Institute of Electronics, Information and Communications Engineers (IEICE)  

    <p>Asymmetry of differential transmission lines over a meshed ground plane causes differential skew, which leads to signal integrity issues. We measured to evaluate how the angle between the differential transmission lines and meshed ground (the rotation angle) affected differential skew. We also investigated the effect of the lines' position on characteristic impedance and the feasibility of high-density layout of the differential transmission lines, including the bend structure. We found that the differential skew and characteristic impedance are not significantly affected by the position of the differential transmission lines and meshed ground when the rotation angle is set to 30°, a relatively small value. Measurements showed that our design is effective.</p>

    DOI: 10.1587/elex.17.20200101

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  • Signal-source estimation from magnetic field image obtained using atomic magnetometer and digital micro-mirror device Reviewed

    Shuji Taue, Yoshitaka Toyota

    OPTICAL REVIEW   27 ( 2 )   258 - 263   2020.4

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    Authorship:Last author   Language:English   Publishing type:Research paper (scientific journal)   Publisher:OPTICAL SOC JAPAN  

    Visualization of an electromagnetic field distribution is helpful for spatial evaluation of field leakage and can aid in solving inverse problems of signal-source estimation. Optical detection is more accurate and less invasive than other methods owing to a low metal content in the sensing probes and signal wires. We have previously reported optical detection of alternating magnetic fields using an alkali-metal atomic magnetometer. In this study, we have proposed a method for imaging the field in a 10 mm diameter area in the sensor head and achieved a resolution below 0.3 mm using a digital micro-mirror device. In this paper, we demonstrate the visualization of an alternating magnetic field at 70 kHz, generated using a Helmholtz coil and a 0.5-mm diameter metal wire attached to the sensor head. Both the uniform field image from the coil and the gradient field image from the wire were clearly observed. The output linearity of the magnetometer was investigated by varying the electric current applied to the coil. In addition, we performed signal-source estimation from the gradient field image. The obtained and calculated distributions were compared to estimate the position of the wire. The estimated wire depth of 1.41 mm was within the range of actual wire depths. This measurement technique has the potential for application in precise position estimation of signal sources with high sensitivity.

    DOI: 10.1007/s10043-020-00591-y

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  • コモンモード放射シミュレーション用電流配分率算出のためのコネクタの簡易モデル構築

    豊田 啓孝, 金尾 奨, 佐田野 勝水, 五百旗頭 健吾

    エレクトロニクス実装学術講演大会講演論文集   34   3B4 - 3   2020

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    Language:Japanese   Publisher:一般社団法人エレクトロニクス実装学会  

    <p>ケーブル-コネクタ間の平衡度不整合によるコモンモード発生、さらに、放射シミュレーションを行うには、コネクタの電流配分率を容易に算出できることが不可欠である。今回、コネクタのSパラメータから電流配分率を算出する簡易モデルを構築したのでこれを報告する。</p>

    DOI: 10.11486/ejisso.34.0_3B4-03

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  • Design of Vialess Open-stub EBG Structure by Using Preference Set-based Design Method Reviewed

    Yoshitaka Toyota, Sho Kanao, Kengo Iokibe

    2019 International Symposium on Electromagnetic Compatibility - EMC EUROPE   2019.9

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    Authorship:Lead author, Corresponding author   Language:English   Publishing type:Research paper (international conference proceedings)   Publisher:IEEE  

    DOI: 10.1109/emceurope.2019.8871971

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  • AC magnetic field imaging by using atomic magnetometer and micro-mirror device Reviewed

    Shuji Taue, Nao Arita, Yoshitaka Toyota

    2019 International Symposium on Electromagnetic Compatibility - EMC EUROPE   2019.9

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    Language:English   Publishing type:Research paper (international conference proceedings)   Publisher:IEEE  

    DOI: 10.1109/emceurope.2019.8871985

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  • Modifying Noise Source Amplitude Modulation Technique to Estimate Magnitude and Phase of Emissions from Individual Integrated Circuits Reviewed

    Kengo Iokibe, Shimpei Yoshino, Yusuke Yano, Yoshitaka Toyota

    2019 International Symposium on Electromagnetic Compatibility - EMC EUROPE   2019.9

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    Authorship:Last author   Language:English   Publishing type:Research paper (international conference proceedings)   Publisher:IEEE  

    DOI: 10.1109/emceurope.2019.8871562

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  • A Method for Optimally Designing Snubber Circuits for Buck Converter Circuits to Damp LC Resonance Reviewed

    Yusuke Yano, Naoki Kawata, Kengo Iokibe, Yoshitaka Toyota

    IEEE Transactions on Electromagnetic Compatibility   61 ( 4 )   1217 - 1225   2019.8

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    Authorship:Last author   Language:English   Publishing type:Research paper (scientific journal)   Publisher:Institute of Electrical and Electronics Engineers (IEEE)  

    A method for optimally designing RL and RC snubber circuits is presented to reduce the electromagnetic interference caused by parasitic LC resonance. The Q factor of the resonance is used as the design criteria. Optimum snubber parameters are determined analytically and uniquely by using a simplified equivalent circuit of the resonant loop and deriving an analytical formula for the Q factor as a function of the snubber parameters. The optimally designed snubbers can adequately adjust the Q factor to any design target. They can also minimize the increases in the negative effects of the snubbers, i.e., overshoot and power loss. The method was applied to RL and RC snubbers to be added to a synchronous buck converter. The effects of the snubbers were reproduced by simulation program with integrated circuit emphasis ( SPICE) simulation to validate the method from the perspective of resonance damping, overshoot, and power loss. The results showed that the damping effects obtained with the optimized snubbers met the Q factor design targets. They also demonstrate that the parameters are optimum in terms of suppressing overshoot and power loss. These results indicate that the method is suitable for optimizing RL and RC snubbers to damp parasitic LC resonance.

    DOI: 10.1109/temc.2018.2841424

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  • Reduction Mechanism of Differential-Mode Crosstalk between Adjacent Differential Pairs with Periodic Structure Reviewed

    Chenyu Wang, Hiroaki Takeda, Kengo Iokibe, Yoshitaka Toyota

    2019 Joint International Symposium on Electromagnetic Compatibility and Asia-Pacific International Symposium on Electromagnetic Compatibility, Sapporo (EMC Sapporo & APEMC 2019)   2019.7

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  • Suppression of Mode Conversion by Improved Shielding Effect of Ethernet Cable Connector Based on Imbalance Factor Matching

    Md. Ashraful Islam, Ryota Irishika, Kengo Iokibe, Yoshitaka Toyota

    International Conference on Computer, Communication, Chemical, Materials and Electronic Engineering (IC4ME2)   2019.7

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  • Parameter Identification Based on Measurement and EMI Prediction of Noise-source Equivalent Circuit Model for Power Converters Invited

    Yoshitaka Toyota

    International Conference on Computer, Communication, Chemical, Materials and Electronic Engineering (IC4ME2)   2019.7

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  • Randomly Shifted Mesh Position of Meshed Ground for High-Density Mounting in FPCs Reviewed

    Chenyu Wang, Kengo Iokibe, Yoshitaka Toyota

    2019 IEEE International Symposium on Electromagnetic Compatibility, Signal and Power Integrity (2019 IEEE EMC+SIPI)   2019.7

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  • Experimental Identification of Relationship between Leakage Trace SNR and Correlation Coefficient in Differential Power Analysis Reviewed

    Yusuke Yano, Toshiaki Teshima, Kengo Iokibe, Yoshitaka Toyota

    2019 Joint International Symposium on Electromagnetic Compatibility and Asia-Pacific International Symposium on Electromagnetic Compatibility, Sapporo(EMC Sapporo & APEMC 2019)   2019.6

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  • Suppression of Mode Conversion by Improving Shielding Around Ethernet Connector with Imbalance Matching Reviewed

    Md. Ashraful Islam, Ryota Irishika, Kengo Iokibe, Yoshitaka Toyota

    2019 Joint International Symposium on Electromagnetic Compatibility and Asia-Pacific International Symposium on Electromagnetic Compatibility, Sapporo (EMC Sapporo & APEMC 2019)   2019.6

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  • Improvement of Prediction Accuracy of Noise-source Equivalent-circuit Model Based on Parameter Extraction by Port Voltage/Current Measurement Reviewed

    Taishi Uematsu, Yuhei Osaki, Yusuke Yano, Kengo Iokibe, Yoshitaka Toyota

    2019 Joint International Symposium on Electromagnetic Compatibility and Asia-Pacific International Symposium on Electromagnetic Compatibility, Sapporo (EMC Sapporo & APEMC 2019)   2019.6

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  • Intensity Estimation of Electromagnetic Emission from Individual ICs Based on Noise Source Amplitude Modulation and Correlation Analysis Reviewed

    Shimpei Yoshino, Kengo Iokibe, Yusuke Yano, Yoshitaka Toyota

    Journal of The Japan Institute of Electronics Packaging   22 ( 3 )   218 - 225   2019.5

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    Authorship:Last author   Language:Japanese   Publishing type:Research paper (scientific journal)   Publisher:Japan Institute of Electronics Packaging  

    <p>In order to reduce electromagnetic interference at low cost, we propose a method to estimate the intensity of the electromagnetic emission for each IC. In this method, the intensity is estimated based on the ratio of noise source levels obtained by the temporal change in EM emissions when the switching currents generated in potential noise sources are intentionally modulated. In this paper, we applied the proposed method to a printed circuit board with multiple ICs and estimated the intensity of electromagnetic emission originating from individual ICs. Moreover, the accuracy of the estimation was evaluated by comparison with measurements made when the IC was individually driven. The results indicated that the emission intensity can be estimated with high accuracy when all the emissions caused by each IC are in phase.</p>

    DOI: 10.5104/jiep.22.218

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  • 差動配線とメッシュグラウンドのなす角に着目した差動スキュー低減 Reviewed

    王 晨宇, 五百旗頭 健吾, 豊田 啓孝

    電子情報通信学会論文誌 B   J102-B ( 3 )   228 - 236   2019.3

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  • Identification of Dominant ICs for Electromagnetic Emission by Using Noise Source Amplitude Modulation and Correlation Analysis

    Shimpei Yoshino, Chiaki Ishida, Kengo Iokibe, Yoshitaka Toyota, Yasuyuki Nogami

    IEEE International Symposium on Electromagnetic Compatibility   2018-August   439 - 444   2018.10

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    To identify semiconductor devices that are dominant noise sources at low cost in order to reduce electromagnetic interference (EMI), we propose a method based on a noise source amplitude modulation technique and correlation analysis (NSM-CA). In this study, we applied the NSM-CA method to a printed circuit board (PCB) with multiple integrated circuits (ICs) and identified ICs dominantly contributing to EM emission. The switching currents produced in three of the ICs were modulated in amplitude with three different modulation signals. The noise source amplitude modulation was implemented in an FPGA, mounted on a PCB, by using three pseudorandom binary sequences (PRBSs) as modulation signals. During the modulations, EM emission was measured at frequencies where the emission exceeded the limit of EMI regulation. The temporal variation in the measured emission was correlated with each of the PRBSs. The ranking of the contributions of the ICs to the emission was determined by means of the resultant correlation coefficients. According to the ranking, the dominant ICs to which a combination of EMI reduction techniques should be primarily applied were identified. Moreover, we applied an EMI reduction technique to the dominant ICs and found a larger reduction in emission than when the technique was applied to low priority ICs.

    DOI: 10.1109/EMCEurope.2018.8485011

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  • Validation of Prediction Method of Common-Mode Current Reduction Based on Imbalance Difference Model for Differential Transmission Line Placed Near Edge of Adjacent Ground Plane Reviewed

    Matsushima Tohlu, Watanabe Tetsushi, Toyota Yoshitaka, Koga Liuji R, Wada Osami

    Journal of The Japan Institute of Electronics Packaging   21 ( 2 )   178 - 185   2018.3

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    Language:Japanese   Publishing type:Research paper (scientific journal)   Publisher:一般社団法人エレクトロニクス実装学会  

    The electric asymmetry of a pair of differential transmission lines placed near an adjacent ground edge causes unwanted electromagnetic radiation when the adjacent ground width changes. In this paper, the imbalance difference model which has been proposed by the authors is verified by experiment and full-wave simulation for asymmetric differential transmission lines at different distances from the adjacent ground edge. The difference in secondary-common mode current in terms of the distance from the ground edge coincides with an error of up to 3 dB among the imbalance difference model, measurement, and electromagnetic simulation. Therefore the imbalance difference model has sufficient accuracy for practical use in designing differential transmission lines which produce less undesired emissions.

    DOI: 10.5104/jiep.21.178

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  • Identification of Dominant ICs for Electromagnetic Emission by Using Noise Source Amplitude Modulation and Correlation Analysis

    Shimpei Yoshino, Chiaki Ishida, Kengo Iokibe, Yoshitaka Toyota, Yasuyuki Nogami

    2018 INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC EUROPE)   439 - 444   2018

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    Language:English   Publishing type:Research paper (international conference proceedings)   Publisher:IEEE  

    To identify semiconductor devices that are dominant noise sources at low cost in order to reduce electromagnetic interference (EMI), we propose a method based on a noise source amplitude modulation technique and correlation analysis (NSM-CA). In this study, we applied the NSM-CA method to a printed circuit board (PCB) with multiple integrated circuits (ICs) and identified ICs dominantly contributing to EM emission. The switching currents produced in three of the ICs were modulated in amplitude with three different modulation signals. The noise source amplitude modulation was implemented in an FPGA, mounted on a PCB, by using three pseudorandom binary sequences (PRBSs) as modulation signals. During the modulations, EM emission was measured at frequencies where the emission exceeded the limit of EMI regulation. The temporal variation in the measured emission was correlated with each of the PRBSs. The ranking of the contributions of the ICs to the emission was determined by means of the resultant correlation coefficients. According to the ranking, the dominant ICs to which a combination of EMI reduction techniques should be primarily applied were identified. Moreover, we applied an EMI reduction technique to the dominant ICs and found a larger reduction in emission than when the technique was applied to low priority ICs.

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  • Intensity Estimation of Electromagnetic Radiation Originated from Individual Source Devices Based on Noise Source Amplitude Modulation and Correlation Analysis

    Proceedings of JIEP Annual Meeting   32   316 - 319   2018

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    Language:Japanese   Publisher:The Japan Institute of Electronics Packaging  

    DOI: 10.11486/ejisso.32.0_316

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  • Application of PRBS for dominant source identification electromagnetic interference caused by digital integrated circuits Reviewed

    Chiaki Ishida, Kengo Iokibe, Yoshitaka Toyota

    2017 IEEE International Conference on Consumer Electronics - Taiwan, ICCE-TW 2017   245 - 246   2017.7

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    Language:English   Publishing type:Research paper (international conference proceedings)   Publisher:Institute of Electrical and Electronics Engineers Inc.  

    Pseudo-random binary sequence (PRBS) was applied to identify dominant noise sources of electromagnetic interference (EMI) radiated from a printed circuit board (PCB) including line driver ICs. The ICs were controlled in activation of output according to a set of PRBSs that varied amplitude of switching current generated in the ICs and also changes the strength of EMI. Correlation coefficients between the temporal variation of conducted EMI strength and PRBS were examined. Results showed that PRBS has a potential to identify dominant noise sources of EMI.

    DOI: 10.1109/ICCE-China.2017.7991087

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  • Signal-to-noise ratio measurements of side-channel traces for establishing low-cost countermeasure design Reviewed

    Yusuke Yano, Kengo Iokibe, Yoshitaka Toyota, Toshiaki Teshima

    2017 Asia-Pacific International Symposium on Electromagnetic Compatibility, APEMC 2017   93 - 95   2017.7

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    Improving the countermeasures against side-channel attacks (SCAs) increases the cost of both designing the countermeasures and evaluating SCA resistance. This may force cryptographic ICs to remain vulnerable. The increased cost is due to an indispensable procedure where a large number of side-channel traces need to be analyzed in order to evaluate the SCA resistance. In this work, a low-cost method to design and evaluate countermeasures using the signal-to-noise ratio (SNR) of side-channel traces as design and evaluation criteria is proposed. The method combines two existing methods: A prediction method of correlation coefficients between side-channel traces and a power model based on the SNR of the side-channel traces, and an estimation method of the number of traces needed to disclose the secret key based on the correlation coefficients. We construct a method to measure the SNR of side-channel traces and validate it for the design and evaluation criteria. In our method, the SNR is first calculated from signal and noise variances extracted from side-channel traces by increasing the number of averaging in side-channel trace measurements, and then the correlation coefficients and the number of traces for key-disclose are estimated on the basis of the calculated SNR. We confirmed that the estimated correlation coefficient and the number of traces for key-disclose were in good agreement with the corresponding measured ones. This result demonstrates that the proposed method can accurately measure the SNR of side-channel traces.

    DOI: 10.1109/APEMC.2017.7975433

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  • Miniaturization of planar EBG structure using dual power planes Reviewed

    Xingxiaoyu Lin, Yoshitaka Toyota, Kengo Iokibe, Toshiyuki Kaneko

    2017 Asia-Pacific International Symposium on Electromagnetic Compatibility, APEMC 2017   241 - 243   2017.7

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    The miniaturization of unit cells in planar electromagnetic bandgap (EBG) structures has been difficult because the stopband frequency depends on the unit-cell size. To solve this problem, we developed an EBG structure that uses two power planes (dual power plane: DPP) with the addition of a capacitive coupling element. This enables us to easily enlarge the capacitance formed in the unit cell and achieve miniaturization with a stopband frequency of interest. Using full-wave simulation, we tested a 2-mm-square (4-mm2) unit cell of the DPP-EBG structure and measured a stopband frequency around 2.4 GHz.

    DOI: 10.1109/APEMC.2017.7975472

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  • Noise Source Estimation Based on Correlation Coefficients between Amplitude-modulated Switching Current and Measured EMI - Principle Verification by Power Noise Measurements -

    Proceedings of JIEP Annual Meeting   31   311 - 314   2017

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    DOI: 10.11486/ejisso.31.0_311

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  • Optimal Design of Vialess Open-stub EBG structure for Power-bus Noise Reduction Reviewed

    Kohtaro Okimoto, Kengo Iokibe, Yoshitaka Toyota, Koichi Kondo, Shigeyoshi Yoshida, Toshiyuki Kaneko

    2016 IEEE CPMT SYMPOSIUM JAPAN (ICSJ)   243 - 246   2016

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    To overcome the intra EMC problems in wireless communications, electromagnetic bandgap (EBG) structures can be used to effectively reduce power-bus noise. We previously proposed a vialess open-stub EBG structure. However, it still has the intrinsic disadvantage of a narrow stopband because it uses the open-stub's resonance. Thus, this paper aims to optimize the structural parameters of the vialess open-stub EBG structure to sufficiently suppress power-bus noise in a wider stopband. The structural parameters to determine the noise-reduction performance of the vialess open-stub EBG structure are the branch width rob, the stub width w(s), and the unit-cell length alpha. Rectangular power buses were designed as test vehicles through the analytical approach and used to evaluate the stopband expansion and the noise suppression in the stopband in a full wave simulation. The transmission characteristics showed that, after w(b), W-s, and a are optimized, the stopband is expanded from 0.61 GHz (2.23-2.84 GHz) to 1.56 GHz (2.20-3.76 GHz). In addition, an optimized structure was made that reduced the amount of noise by approximately 10 dB.

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  • Design Methodology of Tightly Coupled Asymmetrically Tapered Bend for High-density Mounting in Differential Transmission Lines Reviewed

    Chenyu Wang, Kengo Iokibe, Yoshitaka Toyota

    2016 ASIA-PACIFIC INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (APEMC)   463 - 465   2016

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    The bend in a pair of differential transmission lines on printed circuit boards causes a path difference, which leads to mode conversion due to the phase difference. We previously proposed a tightly coupled asymmetrically tapered bend to suppress forward differential-to-common mode conversion. In this paper, we propose a design methodology of our tightly coupled asymmetrically tapered bend that limits the bend structure within the area of the original classic bend for high-density mounting. We also evaluated the 45-degree-angle bend formed based on our design methodology and found that the methodology helps improve or maintain its transmission characteristics compared to those of the classic bend.

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  • Security simulation against side-channel attacks on Advanced Encryption Standard circuits based on equivalent circuit model Reviewed

    Kengo Iokibe, Kazuhiro Maeshima, Tetsushi Watanabe, Yoshitaka Toyota

    IEEE International Symposium on Electromagnetic Compatibility   2015-   224 - 229   2015.9

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    An equivalent circuit model was applied to a cryptographic module to simulate the resistance of the module against side-channel attacks. The cryptographic module involved two fiel programmable gate arrays (FPGAs), on which an Advanced Encryption Standard (AES) circuit was implemented on one of them. The equivalent circuit model proposed in the previous literature was improved in terms of the accuracy of model parameters. Resistance against side-channel attacks was simulated in a more practical configuratio with the improved model than that in the previous work. Resistance was simulated with random plaintexts (input values) to the cryptographic circuit, whereas a biased plaintext set was used to simplify simulation. The simulation was carried out with two decoupling configuration for the power distribution network of the FPGA core that the AES circuit was implemented in. The results obtained from simulation confirme that the equivalent circuit model allowed side-channel resistance to be precisely predicted.

    DOI: 10.1109/ISEMC.2015.7256163

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  • Optical and Electromagnetic Waves Lab., Division of Industrial Innovation Sciences, Graduate School of Natural Science and Technology, Okayama University

    Toyota Yoshitaka

    The Journal of Japan Institute for Interconnecting and Packaging Electronic Circuits   18 ( 4 )   279 - 279   2015

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    DOI: 10.5104/jiep.18.279

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  • Reduction methods of power supply noise due to power distribution network resonance in ICs Reviewed

    Kengo Iokibe, Yoshitaka Toyota

    Journal of Japan Institute of Electronics Packaging   18 ( 5 )   344 - 347   2015

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    DOI: 10.5104/jiep.18.344

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  • Analysis on equivalent current source of AES-128 circuit for HD power model verification

    Kengo Iokibe, Kazuhiro Maeshima, Hiroto Kagotani, Yasuyuki Nogami, Yoshitaka Toyota, Tetsushi Watanabe

    IEEE International Symposium on Electromagnetic Compatibility   2014-December   302 - 305   2014.12

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    We analyzed equivalent current source of cryptographic circuits implemented on a field programmable gate array (FPGA). The equivalent current source represented internal switching current behaviors in the cryptographic circuits during an Advanced Encryption Standard (AES) operation. In this work, the internal current was analyzed for extracting leakage functions and correlation coefficients from scatter diagrams of the Hamming Distance (HD) of AES intermediate values and the current magnitudes. The obtained leakage functions were confirmed a well-known assumption on the HD power model that magnitude of switching current due to transition of register states is proportional to HD of the register. The internal current was also investigated in terms of correlation with the HD model. Correlation coefficients increased as transforming the external power trace in the internal current because two types of noise were reduced by the transform; constant noise and overlap effect of successive rounds. The noise reduction inferred that the use of the internal current source would provide more precise verification of countermeasures.

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  • Ferrite-covered open stub as lossy resonator filter for suppressing noise propagation in power bus Reviewed

    Yoshitaka Toyota, Kengo Iokibe, Koichi Kondo, Shigeyoshi Yoshida

    IEEE International Symposium on Electromagnetic Compatibility   765 - 769   2014.10

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    A lossy resonator filter with frequency selectivity and low loss, which suppresses noise propagation in the power-ground plane pair of a printed circuit board (PCB) at high frequencies (over 1 GHz), was fabricated and evaluated. A ferrite-covered open stub was formed on a PCB as a lossy resonator filter, and its characteristics were verified by measurement using a vector network analyzer as well as full-wave simulation. The measurement and simulation results show that the noise in the power bus of the PCB at frequencies over 1 GHz is suppressed. Even in the case that the power bus is inside the board, noise propagation in the power bus was suppressed by connecting the inside ground plane and the ground plane of the lossy resonator filter by vias in order to conduct the noise to the filter.

    DOI: 10.1109/EMCEurope.2014.6931007

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  • Investigation in burst pulse injection method for fault based cryptanalysis Reviewed

    Kengo Iokibe, Kazuhiro Maeshima, Hiroto Kagotani, Yasuyuki Nogami, Yoshitaka Toyota, Tetsushi Watanabe

    IEEE International Symposium on Electromagnetic Compatibility   2014- ( September )   743 - 747   2014.9

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    This paper investigated about introduction of the burst pulse injection method standardized for immunity tests to a cryptanalysis using faulty ciphertexts. We investigated the potential of the burst injection method to induce faulty ciphertexts experimentally. Firstly, the standard burst pulse was injected through the power cable to a cryptographic module implementing the Advanced Encryption Standard (AES) on a field programmable gate array (FPGA). As a result, it was confirmed that the burst pulse injection might cause clock glitches on the module. Secondly, the clock glitch was varied in magnitude and timing by use of two pulse generators and transmitted to the AES circuit to clarify what types of clock glitch induce critical faulty ciphertexts suited for recovering the crypto-key successfully. Results confirmed that the clock glitch had potential to induce faulty ciphertexts when it exceeded the threshold and produced a clock interval shorter than the critical path delay in the target round. The two experimental results suggested that burst pulse injection to cryptographic modules through their power cables is a possible scenario of fault analysis attacks.

    DOI: 10.1109/ISEMC.2014.6899067

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  • Lossy resonators for suppressing power-bus resonance of printed circuit boards Reviewed

    Farhan Zaheed Mahmood, Yoshitaka Toyota, Kengo Iokibe

    IEEE Electromagnetic Compatibility Magazine   3 ( 1 )   65 - 69   2014.3

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    Power-bus resonance of printed circuit boards causes electromagnetic interference and detraction of power integrity. To suppress the power-bus resonance, we propose the application of lossy resonators in the power bus. Here, we first explain the concepts of the proposed resonators, focusing especially on the application based on the impedance characteristics. Then, we explain the full-wave simulation conducted to demonstrate that the proposed resonator effectively suppressed power-bus resonance.

    DOI: 10.1109/MEMC.2014.6798799

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  • Investigation in Burst Pulse Injection Method for Fault Based Cryptanalysis Reviewed

    Kengo Iokibe, Kazuhiro Maeshima, Hiroto Kagotani, Yasuyuki Nogami, Yoshitaka Toyota, Tetsushi Watanabe

    2014 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC)   743 - 747   2014

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    This paper investigated about introduction of the burst pulse injection method standardized for immunity tests to a cryptanalysis using faulty ciphertexts. We investigated the potential of the burst injection method to induce faulty ciphertexts experimentally. Firstly, the standard burst pulse was injected through the power cable to a cryptographic module implementing the Advanced Encryption Standard (AES) on a field programmable gate array (FPGA). As a result, it was confirmed that the burst pulse injection might cause clock glitches on the module. Secondly, the clock glitch was varied in magnitude and timing by use of two pulse generators and transmitted to the AES circuit to clarify what types of clock glitch induce critical faulty ciphertexts suited for recovering the crypto-key successfully. Results confirmed that the clock glitch had potential to induce faulty ciphertexts when it exceeded the threshold and produced a clock interval shorter than the critical path delay in the target round. The two experimental results suggested that burst pulse injection to cryptographic modules through their power cables is a possible scenario of fault analysis attacks.

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  • Improvement of linear equivalent circuit model to identify simultaneous switching noise current in cryptographic integrated circuits Reviewed

    Kengo Iokibe, Tetsuo Amano, Kaoru Okamoto, Yoshitaka Toyota, Tetsushi Watanabe

    IEEE International Symposium on Electromagnetic Compatibility   834 - 839   2013

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    The authors previously proposed a method based on a linear equivalent circuit model to predict vulnerability of cryptographic devices before fabrication. The method was verified to demonstrate the correlation power analysis attack, a major side-channel attack method, to a cryptographic device with outstanding accuracy. However, no obvious correlation was seen between the equivalent current source modeling the generation of the simultaneous switching noise (SSN) current in the circuit model and the encryption operation used in the previous study. Therefore, in this study, we improved the topology of the linear equivalent circuit model matched with the physical construction of the power distribution network (PDN) and re-identified the equivalent current source. By comparing the improved current source with the encryption operation, obvious correlations between them were found with respect to the period of the round operation and the dependency of the SSN current on the Hamming distance between successive intermediates. The improved equivalent current source was applied on a Field-Programmable Gate Array (FPGA) in which an Advance Encryption Standard (AES) circuit was implemented to simulate power traces that were confirmed to coincide with measured ones. Correlation between the simulated power traces and the power model was investigated using a set of 1000 plaintexts. As a result, the correlation coefficients agreed well with those for measured power traces. Improving the equivalent circuit model topology, thus, helped to identify the SSN current generated in the FPGA during the AES operation. © 2013 IEEE.

    DOI: 10.1109/ISEMC.2013.6670526

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  • Insertion of Parallel RL Circuits into Power Distribution Network for Simultaneous Switching Current Reduction and Power Integrity Reviewed

    Kengo Iokibe, Yusuke Yano, Yoshitaka Toyota

    2012 ASIA-PACIFIC INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (APEMC)   417 - 420   2012

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    We investigated a method using parallel RL circuits inserted into power distribution network (PDN) of integrated circuits (ICs) to enhance the IC in EMI and PI performance. Optimal damping resistances of the parallel RL circuit were derived from a characteristic equation of an equivalent circuit of a partial PDN that contributed to PDN resonances dominantly. The parallel RL circuit with the optimal resistances damps the PDN resonances as quickly as possible and reduces peaks in simultaneous switching current that will cause EMI and in input impedance of PDN related to PI. We validated the parallel RL circuit with respect to EMI and PI performance of ICs numerically and experimentally. Results of these validation showed that the proposed method descend the simultaneous switching current at both chip-package-board and on-board resonant frequency. It is also confirmed that insertion of the parallel RL circuits into the power trace reduced the impedance peak due to the chip-package-board resonance.

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  • Experimental Model Validation of Mode-conversion Sources Introduced to Modal Equivalent Circuit Reviewed

    Kota Sejima, Yoshitaka Toyota, Kengo Iokibe, Liuji R. Koga, Tetsushi Watanabe

    2012 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC)   492 - 497   2012

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    We have developed a modal-equivalent-circuit model with mode-conversion sources for clarifying the mode-conversion mechanism and considering countermeasures against common-mode noise by means of circuit analysis based on the proposed model. The modal equivalent circuit is divided into separate normal-mode and common-mode circuits obtained by applying the mode-decomposition technique to an actual circuit. The separate circuits are connected with the mode-conversion sources at the interface where two transmission lines with different current division factors (h) are connected. This model suggests that the mode conversion that occurs is likely related to the common-mode current and the normal-mode voltage at the interface and the difference in the current division factors (Delta h). This paper validates the model experimentally. First, it is validated by changing the grounding conditions of a simple cable interconnection system. Next, the mode-conversion mechanism suggested by the mode-conversion sources is experimentally examined by matching on common mode and replacing a two-wire cable with a coaxial cable so that Delta h becomes almost 0. Circuit simulation results obtained using the modal equivalent circuit with the mode-conversion sources agree well with measured results and this also demonstrates the model's validity.

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  • Equivalent Current Source of Side-channel Signal for Countermeasure Design with Analog Circuit Simulator Reviewed

    Tetsuo Amano, Kengo Iokibe, Yoshitaka Toyota

    2012 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC)   806 - 811   2012

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    Side-channel attack is a cryptanalytic attack based on information gained from the physical implementation of a cryptographic IC. The simultaneous switching noise (SSN) current is generated as logic gates in cryptographic IC switch simultaneously in encryption processes. SSN current is a cause of electromagnetic interference (EMI). In this study, linear equivalent circuit modeling was examined for the sake of a developing method to evaluate cryptographic systems before fabrication. A linear equivalent circuit model of a cryptographic FPGA, in which an AES algorithm had been implemented, was determined from experimental measurements. The model was implemented into a commercial analog circuit simulator, and the SSN current was estimated under three configurations among which a decoupling circuit, used as a countermeasure, was changed. Estimated current traces were analyzed statistically by using the correlation power analysis (CPA) method to obtain correlation values, a major index security against side-channel attacks. Variation of the correlation values with a decoupling configuration agreed with the corresponding experimental results also obtained in this study. This means that the security of cryptographic devices against side-channel attacks based on analysis of the SSN current can be estimated by using the equivalent circuit model before fabrication.

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  • Identification of Equivalent Current Source of Cryptographic Circuit Based on Impedance and Current Measurements at Board Level Reviewed

    Kaoru Okamoto, Tetsuo Amano, Kengo Iokibe, Yoshitaka Toyota

    2012 PROCEEDINGS OF SICE ANNUAL CONFERENCE (SICE)   73 - 78   2012

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    Side-channel attacks are a kind of cryptanalytic attacks by means of the electric current in the range of radio frequency (RF) leaking out from a cryptographic integrated circuit (IC) and/or the electromagnetic radiation generated by the RF power current. The RF power current is caused by simultaneous switching activities of logic gates during an encryption process operated in the cryptographic IC. The RF power current is a major cause of the electromagnetic interference (EMI). To decrease the RF power current at PCB level can lead to decrease designing costs. As a preparation of applying LECCS models to a cryptographic IC for estimating the RF power current occurred during an encryption process, the model parameters were identified from measurements in this paper. The LECCS models were composed of a current source that expressed the RF power current occurred in the cryptographic circuit and a passive network. The current source identified grown in amplitude 200 ns after the beginning of the encryption process. This agreed to the beginning of the target round. In frequency domain, current spectra were seen at 24 MHz and its harmonics. The authors obtained waveforms of the RF power current from analog circuit simulations with the LECCS model identified, and validated the cryptographic device in security against the side-channel attacks by means of the correlation power analysis (CPA) method. Results of CPA with the simulated waveforms were consistent to CPA results with measured waveforms. These results means that model parameters were identified correctly, and suggests that the LECCS model is effective for validation of cryptographic devices with respect to side-channel attacks.

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  • Experimental model validation of mode-conversion sources introduced to modal equivalent circuit Reviewed

    Kota Sejima, Yoshitaka Toyota, Kengo Iokibe, Liuji R. Koga, Tetsushi Watanabe

    IEEE International Symposium on Electromagnetic Compatibility   492 - 497   2012

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    We have developed a modal-equivalent-circuit model with mode-conversion sources for clarifying the mode-conversion mechanism and considering countermeasures against common-mode noise by means of circuit analysis based on the proposed model. The modal equivalent circuit is divided into separate normal-mode and common-mode circuits obtained by applying the mode-decomposition technique to an actual circuit. The separate circuits are connected with the mode-conversion sources at the interface where two transmission lines with different current division factors (h) are connected. This model suggests that the mode conversion that occurs is likely related to the common-mode current and the normal-mode voltage at the interface and the difference in the current division factors (Δh). This paper validates the model experimentally. First, it is validated by changing the grounding conditions of a simple cable interconnection system. Next, the mode-conversion mechanism suggested by the mode-conversion sources is experimentally examined by matching on common mode and replacing a two-wire cable with a coaxial cable so that Δh becomes almost 0. Circuit simulation results obtained using the modal equivalent circuit with the mode-conversion sources agree well with measured results and this also demonstrates the model's validity. © 2012 IEEE.

    DOI: 10.1109/ISEMC.2012.6351682

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  • Equivalent current source of side-channel signal for countermeasure design with analog circuit simulator Reviewed

    Tetsuo Amano, Kengo Iokibe, Yoshitaka Toyota

    IEEE International Symposium on Electromagnetic Compatibility   806 - 811   2012

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    Side-channel attack is a cryptanalytic attack based on information gained from the physical implementation of a cryptographic IC. The simultaneous switching noise (SSN) current is generated as logic gates in cryptographic IC switch simultaneously in encryption processes. SSN current is a cause of electromagnetic interference (EMI). In this study, linear equivalent circuit modeling was examined for the sake of a developing method to evaluate cryptographic systems before fabrication. A linear equivalent circuit model of a cryptographic FPGA, in which an AES algorithm had been implemented, was determined from experimental measurements. The model was implemented into a commercial analog circuit simulator, and the SSN current was estimated under three configurations among which a decoupling circuit, used as a countermeasure, was changed. Estimated current traces were analyzed statistically by using the correlation power analysis (CPA) method to obtain correlation values, a major index security against side-channel attacks. Variation of the correlation values with a decoupling configuration agreed with the corresponding experimental results also obtained in this study. This means that the security of cryptographic devices against side-channel attacks based on analysis of the SSN current can be estimated by using the equivalent circuit model before fabrication. © 2012 IEEE.

    DOI: 10.1109/ISEMC.2012.6351661

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  • Optimal Resistance Determination Method for RL Damper Circuits in Power Distribution Network of ICs Reviewed

    Ryosuke Yamagata, Kengo Iokibe, Yoshitaka Toyota

    2012 6TH ASIA-PACIFIC CONFERENCE ON ENVIRONMENTAL ELECTROMAGNETICS (CEEM' 2012)   222 - 225   2012

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    We investigated a method using parallel RL circuits inserted into power distribution network (PDN) of integrated circuits (ICs) to enhance the IC in EMI and PI performance. Optimal damping resistances of the parallel RL circuit were derived from a characteristic equation of an equivalent circuit of a partial PDN that contributed to PDN resonances dominantly. The parallel RL circuit with the optimal resistances damps the PDN resonances as quickly as possible and reduces peaks in simultaneous switching current that will cause EMI and in input impedance of PDN related to PI. We validated the parallel RL circuit with respect to EMI and PI performance of ICs numerically and experimentally. Results of these validation showed that the proposed method descend the simultaneous switching current at both chip-package-board and on-board resonant frequency. It is also confirmed that insertion of the parallel RL circuits into the power trace reduced the impedance peak due to the chip-package-board resonance.

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  • Evaluation of Relationship between STP-cable Grounding and Mode Conversion Taking into Account Imbalance Factor Reviewed

    Tatsuya Nobunaga, Yoshitaka Toyota, Kengo Iokibe, Liuji Koga, Tetsushi Watanabe

    2012 6TH ASIA-PACIFIC CONFERENCE ON ENVIRONMENTAL ELECTROMAGNETICS (CEEM' 2012)   119 - 119   2012

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    In grounding an STP cable, mode conversion occurs depending on how to ground it. For investigating the mode conversion in a four-conductor transmission-line system that consists of three conductors and the system ground such as the STP cable above the system ground, as shown in Fig. I. we have developed modal equivalent circuit expressed by an imbalance factor of transmission line, a current division factor, in the same way as we developed the one in a three-conductor transmission-line system. The modal equivalent circuit consists of three modal equivalent circuits of normal mode (Fig. 2), primary common mode (Fig. 3), and secondary common mode(Fig. 4). In this paper, mode conversion between normal mode and primary common mode was evaluated using mixed-mode S parameters and the measured data validated the modal equivalent circuit. As a result, it was found that mode conversion depends on the imbalance factor and it was examined how to ground for suppressing mode conversion.

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  • Verification of Common-Made-Current Prediction Method Based on Imbalance Difference Model for Single-Channel Differential Signaling System Reviewed

    Tohlu Matsushima, Osami Wada, Tetsushi Watanabe, Yoshitaka Toyota, Liuji R. Koga

    2012 ASIA-PACIFIC INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (APEMC)   409 - 412   2012

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    In a differential transmission line, a large common-mode current is excited due to its asymmetry. In this paper, the authors demonstrate experimentally the common-mode current and verify the imbalance difference model that was proposed for prediction of the common-mode current reduction. Experimental results show that the reduction of common-mode current of about 20 dB is achieved by changing the position of the transmission line. In addition, the differences that are calculated using the imbalance difference model are in agreement with the measured ones within 2 dB.

    DOI: 10.1109/APEMC.2012.6237956

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  • On-Board Decoupling of Cryptographic FPGA to Improve Tolerance to Side-Channel Attacks Reviewed

    Kengo Iokibe, Tetsuo Amano, Yoshitaka Toyota

    2011 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC)   925 - 930   2011

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    One of PI/EMC design techniques, on-board decoupling, was proved its possibility to be used as a countermeasure against cryptographic side-channel analysis attack. The on-board decoupling was applied to a side-channel attack standard evaluation board (SASEBO-G) involving a cryptographic FPGA that operated an AES-128 encryption process. Two decoupling conditions were examined. Radio frequency (RF) power current was detected with a current probe that was placed on a power cable connected to SASEBO-G for the cryptographic FPGA. Traces of the RF power current were recorded repeatedly with a digital oscilloscope until 30,000 traces were acquired in each decoupling condition. The traces were analyzed statistically by using the correlation power analysis (CPA). Results of CPA show that necessary number of traces to reveal the secret key significantly increased when the RF power current was attenuated by decoupling over the dominant frequency range in spectra of the RF power current. The decoupling technique can be useful as a countermeasure of side-channel analysis attacks to cryptographic modules.

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  • Power/Ground Layers with EBG Structure and Ferrite Film for Noise Suppression and Power Integrity Improvement Reviewed

    Farhan Zaheed Mahmood, Yoshitaka Toyota, Kengo Iokibe, Koichi Kondo, Shigeyoshi Yoshida

    2011 IEEE ELECTRICAL DESIGN OF ADVANCED PACKAGING AND SYSTEMS SYMPOSIUM (EDAPS)   2011

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    Noise suppression and power integrity (PI) are two requirements for power/ground layers of printed circuit boards (PCBs). We have proposed the application of electromagnetic bandgap (EBG) structure and ferrite film to power/ground layers. In this paper, not only a test board with the proposed structure but three other test boards to be compared were fabricated to measure with a vector network analyzer. The measured data was evaluated for noise-suppression and PI characteristics. Additional evaluation using a commercial circuit simulator was carried out to evaluate noise-suppression and PI characteristics, assuming a real power-supply circuit. Through the evaluation, the test boards with ferrite film including the proposed structure provided sufficient results.

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  • On-board decoupling of cryptographic FPGA to improve tolerance to side-channel attacks Reviewed

    Kengo Iokibe, Tetsuo Amano, Yoshitaka Toyota

    IEEE International Symposium on Electromagnetic Compatibility   925 - 930   2011

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    One of PI/EMC design techniques, on-board decoupling, was proved its possibility to be used as a countermeasure against cryptographic side-channel analysis attack. The on-board decoupling was applied to a side-channel attack standard evaluation board (SASEBO-G) involving a cryptographic FPGA that operated an AES-128 encryption process. Two decoupling conditions were examined. Radio frequency (RF) power current was detected with a current probe that was placed on a power cable connected to SASEBO-G for the cryptographic FPGA. Traces of the RF power current were recorded repeatedly with a digital oscilloscope until 30,000 traces were acquired in each decoupling condition. The traces were analyzed statistically by using the correlation power analysis (CPA). Results of CPA show that necessary number of traces to reveal the secret key significantly increased when the RF power current was attenuated by decoupling over the dominant frequency range in spectra of the RF power current. The decoupling technique can be useful as a countermeasure of side-channel analysis attacks to cryptographic modules. © 2011 IEEE.

    DOI: 10.1109/ISEMC.2011.6038441

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  • Development of equivalent circuit model with transmission line model for designing filters formed on printed circuit boards Reviewed

    Keisuke Matsumoto, Yoshitaka Toyota, Kengo Iokibe, Ryuji Koga

    IEEE International Symposium on Electromagnetic Compatibility   289 - 294   2010

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    The slit pattern formed on the return plane of printed circuit boards (PCBs) acts like a passive element and a defected ground structure (DGS) is one of them. In this paper, we propose an equivalent circuit model with a transmission line model for use in DGS with a filter characteristics. The characteristics of DGS are easily varied with the slit pattern. Thus, DGS is expected to be used for various applications such as a common-mode filter in differential signaling systems. Since a design method has yet to be developed, however, we need to establish a design method for the slit pattern. Some equivalent circuit models have been used, but the models that consist of lumped elements require a full-wave simulation. In addition, the values of the lumped elements do not relate to the physical parameters. Therefore it is not useful for designing filters. In contrast, the equivalent circuit model we propose in this paper will have a great contribution to designing filters with optimum performances and fit for size reduction on PCBs because the transmission line model relates to the physical parameters. As a result, by comparing the transmission characteristics calculated with both a full-wave simulator and a circuit simulator with the proposed equivalent circuit model, the first stop-band width calculated by using the circuit simulator was in agreement with the full-wave simulator. ©2010 IEEE.

    DOI: 10.1109/ISEMC.2010.5711287

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  • Fast Calculation of Power-Bus Resonances in Printed Circuit Boards by Segmentation Method with Single Slit Segments

    HAMAGAMI Takahiro, TOYOTA Yoshitaka, IOKIBE Kengo, KOGA Ryuji

    ITE Technical Report   33   25 - 30   2009

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    A fast algorithm based on a full cavity-mode resonator model of rectangular power-bus structures is able to quickly obtain the power-bus resonance characteristics in multilayer printed circuit boards (PCBs). Furthermore, the approach can provide the resonance characteristics in PCBs with a slit using a slit model expressing electromagnetic coupling across the gap of the slit. However, the model does not express the slit width, which can cause the degradation in accuracy of resonance analysis. In this paper, a slit segment was studied to express the gap of the single slit coupling and analyze the power-bus resonances. The slit segment was given from an equivalent circuit based on a coupled microstrip line. As a result, it was found that the slit segment can provide the power-bus resonance characteristics as accurate as or more accurate than the conventional slit model.

    DOI: 10.11485/itetr.33.15.0_25

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  • De-embedding of Board Parasitics with T-parameters for S-parameter Measurements of Integrated Circuits on PCB-Examinations in One-port Measurements Reviewed

    Kazuki Maeda, Kengo Iokibe, Yoshitaka Toyota, Ryuji Koga

    CEEM: 2009 5TH ASIA-PACIFIC CONFERENCE ON ENVIRONMENTAL ELECTROMAGNETICS   246 - 249   2009

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  • Estimation of Radiated Emissions from Multilayered Printed Circuit Board by Common-Mode Antenna Model Reviewed

    Yuli Wakaduki, Tetsushi Watanabe, Yoshitaka Toyota, Kengo Iokibe, Ryuji Koga

    CEEM: 2009 5TH ASIA-PACIFIC CONFERENCE ON ENVIRONMENTAL ELECTROMAGNETICS   242 - +   2009

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  • Stopband prediction with dispersion diagram for electromagnetic bandgap structures in printed circuit boards Reviewed

    Yoshitaka Toyota, Arif Ege Engin, Tae Hong Kim, Madhavan Swaminathan, Kazuhide Uriu

    2006 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, VOLS 1-3, PROCEEDINGS   807 - 811   2006

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    Electromagnetic bandgap (EBG) structures that prevent propagation of electromagnetic waves within a given frequency range are quite effective in suppressing simultaneous switching noise on parallel power planes. However, it is quite time consuming to compute the stopband frequencies of interest using full-wave electromagnetic simulation of the entire structure. In contrast, using dispersion-diagram analysis based on a unit-cell network of EBG structures is more efficient and less time consuming. This paper presents an approach for two-dimensional EBG structures by extending a well-known dispersion-diagram analysis of one-dimensional infinite periodic structures. The stopbands predicted with the proposed analysis were compared with good agreement to measured and simulated results. In addition, the concept was applied to test the stopband range of EBG structures formed on an actual printed circuit board with a test coupon of an EBG unit cell placed on the same board.

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  • Translation of the electromagnetic mode-splitting along a microstrip line with a slit in the ground plane Reviewed

    Ryuji Koga, Tohlu Matsushima, Tetsushi Watanabe, Youhei Sakai, Osami Wada, Kengo Iokibe, Yoshitaka Toyota

    CEEM' 2006: ASIA-PACIFIC CONFERENCE ON ENVIRONMENTAL ELECTROMAGNETICS, VOLS 1 AND 2, PROCEEDINGS   15 - +   2006

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    Is proposed an approach to know magnitudes of parasitic electromagnetic modes excited by the micro-strip line passing over a slit in the return plane. A part of the power having been carried along, the microstrip-line is transferred to the coplanar-line modes along the slot, and the cylindrical. mode in between the pair of re. turn and ground planes. Magnitudes of those modes are expressed by the ratio of powers of the excited electromagnetic mode to the original microstrip line mode, discarding information of phase. Calculation was done with FDTD in the limited domain., around the cross-point in a moderate time of calculation. This approach contributes to the efficient designing of PCB of commercial electronic devices.

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  • Modeling of gapped power bus structures for isolation using cavity modes and segmentation Reviewed

    ZL Wang, S Wada, Y Toyota, R Koga

    IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY   47 ( 2 )   210 - 218   2005.5

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    Resonance characteristics of gapped power bus structures with a slit or a gap were studied, using a fast algorithm based on a full cavity-mode resonator model and the segmentation method. Inductance and capacitance models were used to account for a field coupling along the slit and across the gap, respectively. The effectiveness of the segmentation method and the inductance model for the slit has been demonstrated by good agreement between the calculated and measured results, while the capacitance model for the gap is shown to be useful when the coupling between the segments is relatively weak.

    DOI: 10.1109/TEMC.2005.847414

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  • Power current modeling of IC/LSI with load dependency for EMI simulation Reviewed

    H Osaka, T Kinoshita, D Tanaka, O Wada, Y Toyota, R Koga

    2003 IEEE SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, SYMPOSIUM RECORD, VOLS 1 AND 2   16 - 21   2003

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    In this paper, we describe how we modeled EMI noise from the power-pin current of an LSI that has two ports: a power-ground port and a driver output port. We named this modeling the "Linear Equivalent Circuit and Current Source for I/O (LECCS-I/O)" model and with it measured power current and power-ground impedance for various combinations of loading capacitances and decoupling inductances using a small scale IC (74LVC04). Results showed that up to 500 MHz, the LECCS-I/O model could predict peak and valley frequencies of the power current where the error was within 2.5 MHz, and where the peak current error was less than 5 dB. The application range of the LECCS-I/O model is valid where the non-overlap duration of the dumping oscillation wave between cycles is longer than twice the time constant of the waveform.

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  • High-speed common-mode prediction method for PCBs having a signal line close to the ground edge Reviewed

    T Watanabe, H Fujihara, O Wada, A Namba, Y Toyota, R Koga

    2003 IEEE SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, SYMPOSIUM RECORD, VOLS 1 AND 2   28 - 33   2003

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    Evaluation of common-mode excitation is important to efficiently reduce the EMI radiated from printed circuit boards (PCBs). We have focused on the excitation mechanisms of the common-mode current flowing on a PCB. In a previous paper, we explained a mechanism of common-mode excitation in terms of the current division factor, which expresses the degree of imbalance of a transmission line. The calculation is two-dimensional so the evaluation time is much shorter than that of FDTD or other 3D fullwave simulations. The calculated reduction of common-mode radiation from simple PCBs agreed well with the measured value. In this paper, to demonstrate the effectiveness of this approach, we apply it to various PCBs, such as one that has a signal trace close to a board edge or one with guard bands, and evaluate the effectiveness of the common-mode reduction. Our calculated and experimental results are in good agreement.

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  • Analysis of resonance characteristics of a power bus with rectangle and triangle elements in multilayer PCBs Reviewed

    ZL Wang, O Wada, Y Toyota, R Koga

    ASIA-PACIFIC CONFERENCE ON ENVIRONMENTAL ELECTROMAGNETICS, CEEM'2003, PROCEEDINGS   73 - 76   2003

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    Language:English   Publishing type:Research paper (international conference proceedings)   Publisher:PUBLISHING HOUSE BEIJING UNIV POSTS & TELECOMMUNICATIONS  

    One of the major source of radiated EMI is attributed to power bus resonance in a printed circuit board(PCB). A fast algorithm, combined with the segmentation method, is applied for calculating resonance characteristics of a power bus whose pattern consisting of several segments of rectangles and/or right-angled triangles. Good agreements between the calculated and measured results demonstrate the usefulness and accuracy of the fast algorithm and the segmentation method.

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  • Stable inversion method for a polarized-lidar: Analysis and simulation Reviewed

    He Wei, Ryuji Koga, Kengo Iokibe, Osami Wada, Yoshitaka Toyota

    Journal of the Optical Society of America A: Optics and Image Science, and Vision   18 ( 2 )   392 - 398   2001

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    A new inversion inhomogeneous atmosphere (IA) method that is more stable than Fernald’s method for two-component (molecule and aerosol) scattering analysis of polarized Mie lidar signals is proposed and examined. The backscattering coefficient and the extinction-to-backscattering ratio (EBR) can be calculated for specified regions at which the depolarization ratio is less than that of molecule without further assumptions. The inversion procedure can be extended to both inward stepwise and outward stepwise integration algorithms. Simulation results indicate that a higher precision was achieved with the IA method than with Fernald’s method in terms of error and random noise in estimating boundary value and EBR. Experimental results were also better with the IA method than with Fernald’s method. © 2001 Optical Society of America.

    DOI: 10.1364/JOSAA.18.000392

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  • Charging Simulation of Micro-structured Pattern in Ion Implantation

    SAKAI Shigeki, TSUJI Hiroshi, GOTOH Yasuhito, TOYOTA Yoshitaka, ISHIKAWA Junzo, TANJYO Masayasu, MATSUDA Koji

    Journal of the Vacuum Society of Japan   38 ( 3 )   228 - 230   1995.3

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    DOI: 10.3131/jvsj.38.228

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  • Negative-Ion Production of Gas Material in RF-Plasma Sputter-Type Heavy Negative-Ion Source

    TSUJI Hiroshi, OKAYAMA Yoshio, TOYOTA Yoshitaka, GOTOH Yasuhito, ISHIKAWA Junzo

    Journal of the Vacuum Society of Japan   38 ( 3 )   218 - 220   1995.3

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    DOI: 10.3131/jvsj.38.218

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  • Special Number/Negative-Ion Beam Technology and Its Application to Materials Science. Surface Potential Measurement of Negative-Ion-Implanted Insulators by Analysing Secondary Electron Energy Distribution. Reviewed

    豊田啓孝, 辻博司, 南雲正二, 酒井滋樹, 後藤康仁, 石川順三

    Ionics   20 ( 1 )   71 - 76   1994.1

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  • Special Number/Negative-Ion Beam Technology and Its Application to Materials Science. Surface Potential Measurement of Insulated Electrode by Negative-Ion Implantation. Reviewed

    辻博司, 酒井滋樹, 豊田啓孝, 岡山芳央, 後藤康仁, 石川順三

    Ionics   20 ( 1 )   57 - 64   1994.1

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  • Parameter Identification of Noise Source Equivalent Circuit Model of Brush Motor Considering Temperature Dependence and Conducted Emission Prediction

    菅翔平, 上本篤志, XU Zhenhong, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会大会講演論文集(CD-ROM)   2021   2021

  • Abnormal Position Detection in Wire Network by Applying k-Nearest Neighbor Algorithm to Sequence Time Domain Reflectometry

    亀山大樹, 安原朝陽, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会大会講演論文集(CD-ROM)   2021   2021

  • Time-Frequency Domain Correlation Power Analysis for Side-Channel Attack Resistance Evaluation of Practical Modules

    日室雅貴, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会技術研究報告(Web)   121 ( 6(EMCJ2021 1-6) )   2021

  • Evaluation of Unintentional Radiated Emissions from Unshielded Twist Pair Cable

    五十嵐俊, 宮脇大輔, 山岸傑, 桑山一郎, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会大会講演論文集(CD-ROM)   2021   2021

  • Parameter Identification of Noise-source Equivalent-circuit Model Focusing on Turn-on/Turn-off Timing of DC/DC Converter and Evaluation of Conducted Disturbance Measurement

    2020 ( 57 )   49 - 54   2020.12

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  • Parameter Identification of Noise-source Equivalent-circuit Model Focusing on Turn-on/Turn-off Timing of DC/DC Converter and Evaluation of Conducted Disturbance Measurement

    2020 ( 184 )   49 - 54   2020.12

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  • A Study for Predicting Power Side-Channel Attack Countermeasure Effect by PDN Decoupling Based on Transfer Impedance

    2020 ( 1 )   23 - 28   2020.1

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  • Parameter Identification of Noise-source Equivalent-circuit Model Focusing on Turn-on/Turn-off Timing of DC/DC Converter and Evaluation of Conducted Disturbance Measurement

    上松大志, ZHANG Shuqi, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会技術研究報告(Web)   120 ( 282(EMCJ2020 55-63) )   2020

  • Examination of Requirements for Power Side-Channel Attack Resistance Evaluation Boards of Cryptographic Integrated Circuits-Contribution of PDN Transfer Impedance to Leakage Strength-

    菅智信, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会技術研究報告(Web)   120 ( 211(HWS2020 25-41) )   2020

  • A Study for Predicting Power Side-Channel Attack Countermeasure Effect by PDN Decoupling Based on Transfer Impedance

    五百旗頭健吾, 矢野佑典, 豊田啓孝

    電子情報通信学会技術研究報告   119 ( 387(EMCJ2019 81-91)(Web) )   2020

  • Suppression of Mode Conversion Using Asymmetric Differential-Transmission Lines for Dense Parallel Traces

    竹内智哉, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会技術研究報告(Web)   120 ( 20(EMCJ2020 5-10) )   2020

  • Simple Model of Connector to Estimate Current Division Factor for Common-mode Radiation Simulation

    豊田啓孝, 金尾奨, 佐田野勝水, 五百旗頭健吾

    エレクトロニクス実装学会講演大会講演論文集(CD-ROM)   34th   2020

  • AC magnetic field distribution measurement with optical magnetometer and ghost imaging technique

    田上周路, 田中拓充, 豊田啓孝

    Optics & Photonics Japan講演予稿集(CD-ROM)   2020   2020

  • Preliminary Study on Modeling of Noise Current and Electromagnetic Radiation for EMI Evaluation of Movable Device with Brush Motors

    119 ( 134 )   19 - 24   2019.7

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  • Preliminary Study on Modeling of Noise Current and Electromagnetic Radiation for EMI Evaluation of Movable Device with Brush Motors

    上本篤志, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会技術研究報告   119 ( 134(EMD2019 11-16) )   2019

  • Intensity and Phase Estimation of Far-Field Emission of Individual ICs by Using Noise Source Amplitude Modulation Technique

    五百旗頭健吾, 吉野慎平, 矢野佑典, 豊田啓孝

    電子情報通信学会技術研究報告   119 ( 20(EMCJ2019 13-17)(Web) )   2019

  • Improvement of Prediction Accuracy by Improving Parameters Extraction in 2-port Noise-source Equivalent Circuit Model of DC/DC Converter

    大崎悠平, 矢野佑典, 上松大志, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会技術研究報告   118 ( 406(EMCJ2018 100-106)(Web) )   2019

  • PSD手法を用いたビアレス・オープンスタブ型EBG構造の設計

    金尾奨, 奥山友貴, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会大会講演論文集(CD-ROM)   2019   2019

  • 周期構造を有する隣接差動線路間のディファレンシャルモードクロストークの低減メカニズム

    WANG Chenyu, 竹田大晃, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会大会講演論文集(CD-ROM)   2019   2019

  • Improvement of Robustness by Normalization of Design Parameters in PSD Method-The Case of Vialess Open-stub EBG Structure-

    金尾奨, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会技術研究報告   119 ( 124(EMCJ2019 18-29)(Web) )   2019

  • A study on application of electromagnetic interference source estimation method to power electronics circuit by noise source amplitude modulation and correlation analysis

    川島渉, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会技術研究報告   119 ( 124(EMCJ2019 18-29)(Web) )   2019

  • Prediction Accuracy in Conduction Disturbance Voltage of DC/DC Buck Converter Using Noise-source Equivalent-circuit Model

    上松大志, 大崎悠平, 矢野佑典, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会技術研究報告   119 ( 1(EMCJ2019 1-12)(Web) )   2019

  • Design of Differential Transmission Lines with Periodic Structure for Crosstalk Suppression by Preference Set-based Design Method (電磁環境 マグネティックス合同研究会 EMC一般(EMC Joint Workshop, 2018, Daejon))

    Takeda Hiroaki, Iokibe Kengo, Toyota Yoshitaka

    電気学会研究会資料. EMC = The papers of technical meeting on electromagnetic compatibility, IEE Japan   2018 ( 48 )   11 - 15   2018.11

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  • Design of Differential Transmission Lines with Periodic Structure for Crosstalk Suppression by Preference Set-based Design Method (電磁環境 マグネティックス合同研究会 EMC一般(EMC Joint Workshop, 2018, Daejon))

    Takeda Hiroaki, Iokibe Kengo, Toyota Yoshitaka

    電気学会研究会資料. MAG = The papers of technical meeting on magnetics, IEE Japan   2018 ( 120 )   11 - 15   2018.11

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  • Study on Signal-to-Noise Ratio Simulation of Side-Channel Traces Leaked from AES Circuit using EDA tool

    118 ( 272 )   1 - 5   2018.10

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  • Evaluation of Differential Skew Depending on Rotation Angle in Printed Circuit Board with Meshed Ground Plane

    117 ( 510 )   25 - 30   2018.3

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  • Optical projection of AC magnetic field by using alkali metal atoms : High-resolution imaging by use of a digital micro-mirror device

    田上 周路, 豊田 啓孝, 藤森 和博, 深野 秀樹

    電子情報通信学会技術研究報告 = IEICE technical report : 信学技報   117 ( 384 )   19 - 23   2018.1

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  • Determination of High Priority Countermeasures to Reduce Electromagnetic Interference by Using Noise Source Amplitude Modulation and Evaluation of its Effect

    117 ( 384 )   49 - 54   2018.1

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  • Miniaturization of Planar EBG Structure with Dual Power Planes : Introduction of Thin Line into the Unit Cell for Increase in Inductance

    117 ( 384 )   43 - 48   2018.1

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  • Insertion of LC Resonator onto Cryptographic Module for Accelerated Evaluation of Side Channel Attack

    117 ( 384 )   77 - 81   2018.1

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  • Analysis of Suppressing Mechanism of Power-bus Resonance Using Lossy Resonator Filter with Pi Equivalent Circuits

    金尾奨, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会技術研究報告   118 ( 162(EMCJ2018 22-33)(Web) )   2018

  • 差動伝送線路への周期構造導入によるクロストーク抑制

    竹田大晃, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会論文誌 B(Web)   J101-B ( 3 )   2018

  • ノイズ源振幅変調と相関解析に基づく放射源デバイス毎の電磁妨害波放射強度推定

    吉野慎平, 石田千晶, 五百旗頭健吾, 豊田啓孝

    エレクトロニクス実装学会講演大会講演論文集(CD-ROM)   32nd   2018

  • Evaluation of Differential Skew Depending on Rotation Angle in Printed Circuit Board with Meshed Ground Plane

    WANG Chenyu, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会技術研究報告   117 ( 510(EMCJ2017 105-112) )   2018

  • Determination of High Priority Countermeasures to Reduce Electromagnetic Interference by Using Noise Source Amplitude Modulation and Evaluation of its Effect

    吉野慎平, 石田千晶, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会技術研究報告   117 ( 384(EMCJ2017 88-104) )   2018

  • Miniaturization of Planar EBG Structure with Dual Power Planes-Introduction of Thin Line into the Unit Cell for Increase in Inductance-

    LIN Xingxiaoyu, 五百旗頭健吾, 豊田啓孝, 金子俊之

    電子情報通信学会技術研究報告   117 ( 384(EMCJ2017 88-104) )   2018

  • Study on Signal-to-Noise Ratio Simulation of Side-Channel Traces Leaked from AES Circuit using EDA tool

    手嶋俊彰, 矢野佑典, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会技術研究報告   118 ( 273(ICD2018 39-47) )   2018

  • Insertion of LC Resonator onto Cryptographic Module for Accelerated Evaluation of Side Channel Attack

    河田直樹, 矢野佑典, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会技術研究報告   117 ( 384(EMCJ2017 88-104) )   2018

  • Improvement of Noise Source Amplitude Modulation Method to Identify Source Devices of Electromagnetic Interference

    117 ( 319 )   35 - 40   2017.11

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  • Crosstalk Suppression in Differential Transmission Lines with Periodic Structure

    117 ( 1 )   23 - 28   2017.4

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  • Parameter Identification of a Noise-source Linear Equivalent Circuit of DC-DC Converter

    117 ( 1 )   29 - 34   2017.4

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  • アルカリ金属を用いた交流磁界の光学検出―市販の磁界テスタとの比較と永久磁石を用いたプローブ化の検討―

    田上周路, 篠原優, 豊田啓孝, 藤森和博, 深野秀樹

    電子情報通信学会論文誌 B(Web)   J100-B ( 3 )   158‐165 (WEB ONLY)   2017.3

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  • AC Magnetic Field Imaging by using Digital Micro-mirror Device Reviewed

    Taue, Shuji, Toyota, Yoshitaka, Fujimori, Kazuhiro, Fukano, Hideki

    2017 22ND MICROOPTICS CONFERENCE (MOC)   2017-November   212 - 213   2017

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    We demonstrated optical imagings of AC magnetic fields. A digital micro-mirror device and a lock-in detection allowed obtaining sub-millimeter resolution images without using magnetic shields. Images of gradient field from a wire suggested its potential to apply for signal-source estimations.

    DOI: 10.23919/MOC.2017.8244562

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  • 損失を有する共振器型フィルタの設置位置による電源層間ノイズ抑制効果の評価と考察

    金尾奨, 五百旗頭健吾, 豊田啓孝

    電気・情報関連学会中国支部連合大会講演論文集(CD-ROM)   68th   2017

  • ノイズ源変調に基づくノイズ源推定法の精度向上

    石田千晶, 吉野慎平, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会大会講演論文集(CD-ROM)   2017   2017

  • RLスナバを用いた同期整流降圧コンバータにおけるLC共振抑制

    河田直樹, 矢野佑典, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会大会講演論文集(CD-ROM)   2017   2017

  • Crosstalk Suppression in Differential Transmission Lines with Periodic Structure

    竹田大晃, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会技術研究報告   117 ( 1(EMCJ2017 1-6) )   2017

  • Parameter Identification of a Noise-source Linear Equivalent Circuit of DC-DC Converter

    大崎悠平, 矢野佑典, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会技術研究報告   117 ( 1(EMCJ2017 1-6) )   2017

  • 振幅変調したスイッチング電流とEMI測定の相関係数に基づくノイズ源推定~電源ノイズ測定による原理検証~

    石田千晶, 五百旗頭健吾, 豊田啓孝

    エレクトロニクス実装学会講演大会講演論文集(CD-ROM)   31st   2017

  • Effect of spatial nonuniformity of DC magnetic field on AC magnetic field detection with atomic magnetometer

    田上 周路, 篠原 優, 豊田 啓孝, 藤森 和博, 深野 秀樹

    電子情報通信学会技術研究報告 = IEICE technical report : 信学技報   116 ( 320 )   7 - 12   2016.11

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  • Attempt for Determining Cryptographic Circuit Blocks Leaking Side-Channel Information Based on Internal Current Source : Examination with FPGA Implementation of AES Circuits

    116 ( 255 )   79 - 84   2016.10

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  • Miniaturization of a Planar EBG Structure by Using Double Power Plane

    116 ( 223 )   41 - 45   2016.9

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  • Linear Equivalent Circuit Modeling of Power Converter Circuit for Conducted Disturbance Estimation : Impact of Trigger Timing on the modeling

    116 ( 26 )   41 - 45   2016.5

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  • Miniaturization of Planar EBG Structure by Using Interdigital Electrodes

    116 ( 4 )   11 - 16   2016.4

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  • B-4-41 Optimization Method of On-board RL Snubber Parameters in Common Power Distribution Networks

    Kawata Naoki, Yano Yuusuke, Iokibe Kengo, Toyota Yoshitaka

    Proceedings of the IEICE General Conference   2016 ( 1 )   361 - 361   2016.3

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  • B-4-61 A Study on Signal-to-Noise Ratio of Side-Channel Traces for Evaluation of Attacking Cost of Cryptographic Modules

    Yano Yusuke, Iokibe Kengo, Toyota Yoshitaka

    Proceedings of the IEICE General Conference   2016 ( 1 )   381 - 381   2016.3

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  • Connector Model for Use in Common-Mode Antenna Model Used to Estimate Radiation from Printed Circuit Boards with Board-to-Board Connector

    Yuri Wakaduki, Tetsushi Watanabe, Yoshitaka Toyota, Kengo Iokibe, Liuji R. Koga, Osami Wada

    IEICE TRANSACTIONS ON COMMUNICATIONS   E99B ( 3 )   695 - 702   2016.3

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    A connector model expressed as an inductance is proposed for use in a previously reported common-mode antenna model. The common-mode antenna model is an equivalent model for estimating only common-mode radiation from a printed circuit board (PCB) more quickly and with less computational resources than a calculation method that fully divides the entire structure of the PCB into elemental cells, such as narrow signal traces and thin dielectric layers. Although the common-mode antenna model can estimate the amount of radiation on the basis of the pin configuration of the connector between two PCBs, the calculation results do not show the peak frequency shift in the radiation spectrum when there is a change in the pin configuration. A previous study suggested that the frequency shift depends on the total inductance of the connector, which led to the development of the connector model reported here, which takes into account the effective inductance of the connector. The common-mode antenna model with the developed connector model accurately simulates the peak frequency shift caused by a change in the connector pin configuration. The results agree well with measured spectra (error of 3 dB).

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  • Modeling of Current Probe and Simulation with Modal Equivalent Circuit in Common-mode Current Injection to Cable

    115 ( 427 )   65 - 70   2016.1

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  • Suppression of mode conversion by installing bypass capacitor to power distribution network

    Yoshitaka Toyota, Toshiki Mikura, Kengo Iokibe

    IEEJ Transactions on Fundamentals and Materials   136 ( 1 )   25 - 32   2016.1

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    In the modal-equivalent circuit derived from the view of the mode-decomposition technique, mode-conversion sources are placed at the interface where the imbalance factor of the transmission lines changes. In addition, the amount of the mode-conversion sources is proportional to not only the difference in the imbalance factor but also the magnitudes of the normal-mode voltage and the common-mode current at the same position. In this paper, therefore, the suppression of mode conversion from normal mode to common mode is experimentally examined by installing a bypass capacitor to power distribution network. The bypass capacitor helps reduce the normal-mode voltage in the vicinity of a connector on a test board where mode conversion occurs so that the common-mode current flowing a power-line cable and the electric field far from the test board are decreased. In fact, the mode conversion was most suppressed when the bypass capacitor is placed closest to the connector on the test board. Also, it was found that the mode conversion was suppressed by the capacitor installed to the power-line cable in the vicinity of the connector.

    DOI: 10.1541/ieejfms.136.25

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  • Analysis of side-channel information leaking behavior in cryptographic circuit using internal current source

    Kengo Iokibe, Nobuhiro Tai, Hiroto Kagotani, Hiroyuki Onishi, Yoshitaka Toyota, Tetsushi Watanabe

    IEEJ Transactions on Fundamentals and Materials   136 ( 6 )   365 - 371   2016

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    Cryptographic circuits were analyzed regarding their side-channel information leaking behavior based on internal current source. Cryptographic circuits were implemented in an FPGA with registers arranged to demonstrate three known side-channel information leaking behaviors
    (1) leakage is reduced by making Hamming distance (HD) at registers constant, (2)leakage increases with signal-to-noise ratio of side-channel traces, and (3) unbalance of routing path from registers to load circuits produces leakage. The implemented circuits were measured in terms of voltage fluctuation in the power distribution network for FPGA core circuit where the circuits were implemented. The measured voltage fluctuations were converted into internal current sources that were exploited to analyze the information leaking behavior by applying a side-channel analysis, correlation power analysis (CPA). The analysis confirmed that internal current source clearly demonstrated the side-channel information leaking behaviors. This results suggests that internal current source would allow to understand what parts of encryption circuits largely contribute to leak information and how to develop an efficient and low-cost countermeasure against side-channel attacks.

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  • 暗号回路におけるサイドチャネル情報漏洩挙動の内部電流源による分析

    五百旗頭健吾, 田井伸拓, 籠谷裕人, 大西紘之, 豊田啓孝, 渡辺哲史

    電気学会論文誌 A   136 ( 6 )   2016

  • 近傍磁界分布測定を利用したサイドチャネル情報漏洩特性の分析

    五百旗頭健吾, 矢野佑典, 豊田啓孝

    電子情報通信学会大会講演論文集(CD-ROM)   2016   2016

  • 損失を有する共振器型フィルタ実用化のための複雑形状の電源/GND層間の共振抑制評価

    久保輝真, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会大会講演論文集(CD-ROM)   2016   2016

  • ディジタルICの電源供給回路網に付加するオンボードRLスナバの最適抵抗値決定式の導出

    河田直樹, 吉野慎平, 矢野佑典, 五百旗頭健吾, 豊田啓孝

    電気・情報関連学会中国支部連合大会講演論文集(CD-ROM)   67th   2016

  • A Design Methodology of Lossy Resonator Filter Taking into Account Electric Characteristics of Ferrite Thin Film

    115 ( 309 )   31 - 36   2015.11

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  • B-4-47 Optimization of On-board RL Snubber for Damping Resonance in Power Distribution Network for ICs

    Iokibe Kengo, Kawata Naoki, Toyota Yoshitaka

    Proceedings of the Society Conference of IEICE   2015 ( 1 )   260 - 260   2015.8

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  • Tightly Coupled Asymmetrically Tapered Bend in Differential Transmission Lines for High-density Mounting

    115 ( 131 )   49 - 54   2015.7

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  • Suppression of Mode Conversion by Using Tightly Coupled Asymmetrically Tapered Bend in Differential Lines

    Yoshitaka Toyota, Shohei Kan, Kengo Iokibe

    IEICE TRANSACTIONS ON COMMUNICATIONS   E98B ( 7 )   1188 - 1195   2015.7

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    In this paper, we propose a tightly coupled asymmetrically tapered bend to suppress differential-to-common mode conversion caused by bend discontinuity in a pair of differential lines. Tightly coupled symmetrically tapered bends have been so far proposed to suppress the mode conversion by decreasing the path difference in the bend. This approach makes the path difference shorter so that the differential lines are coupled more tightly but the path difference of twice the sum of the line width and the line separation still remains. To suppress the remaining path difference, this paper introduces the use of asymmetric tapers. In addition, two-section tapers are applied to reduce differential-mode reflection increased by the tapers and hence improve differential-mode propagation. A full-wave simulation of a right-angled bend demonstrates that the forward differential-to-common mode conversion is decreased by almost 30 dB compared to the symmetrically tapered bend and that the differential-mode reflection coefficient is reduced to the same amount as that of the classic bend. Also, the generality of the proposed bend structure is discussed.

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  • Reduction in Common-mode Noise Generation by Placing Capacitors at Mode-conversion Positions in Power Distribution Network

    115 ( 29 )   7 - 12   2015.5

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  • Investigation of low-frequency electromagnetic wave measurement using spin-polarized alkali metal atoms

    115 ( 29 )   43 - 48   2015.5

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  • B-4-63 Effect of Common-mode Characteristic Impedance on Signal Integrity in Differential Transmission Lines

    Takariki Keita, Kan Shohei, Toyota Yoshitaka, Iokibe Kengo

    Proceedings of the IEICE General Conference   2015 ( 1 )   353 - 353   2015.2

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  • A Vialess Open-stub EBG Structure for Power-bus Noise Reduction

    YAMASHITA Yuki, TOYOTA Yoshitaka, IOKIBE Kengo, KONDO Koichi, YOSHIDA Shigeyoshi, KANEKO Toshiyuki

    IEICE technical report. Electromagnetic compatibility   114 ( 398 )   57 - 62   2015.1

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    Electromagnetic bandgap (EBG) formed by a periodic structure (EBG structure) has been studied for reducing power-bus noise of printed circuit boards. The EBG structure obtains a large amount of noise suppression and is available for separating simultaneous switching noise generated in digital circuits and small rf signal in analog circuits on mixed-signal boards. Many kinds of EBG structures have been so far proposed and can be roughly classified into two types with and without vias. We have focused on Planar EBG structures without vias because they consist of only two layers and cost-effective due to no vias. In contrast, open-stub EBG structure, which is one of EBG structures with vias, is easy to miniaturize its cell size independently of suppression frequency. We considered that the open-stub EBG structure was specialized for the EBG structures with vias. In this report, however, a planer EBG structure with open stub is proposed by inventing a new structure. The effect of power-bus noise reduction is examined by full-wave simulation and validated in the 2.4 GHz band.

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  • Effect of Mg loading on the high-frequency tunability of Ba0.8Sr0.2TiO3 ceramics

    Takashi Teranishi, Tsuyoshi Sogabe, Hidetaka Hayashi, Akira Kishimoto, Kengo Iokibe, Yoshitaka Toyota

    JAPANESE JOURNAL OF APPLIED PHYSICS   54 ( 1 )   11502-1-011502-6   2015.1

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    The effect of Mg loading on the high-frequency tunable properties and dielectric loss of Ba0.8Sr0.2Ti1-xMgxO3 (BSTM) ceramics was investigated. Variation in the lattice parameters and the 90 degrees domain configuration with Mg loading indicated a decrease in the tetragonal distortion. Additionally, the 90 degrees domain size decreased slightly with a low Mg loading, up to 0.1 mol %, resulting in a higher domain-wall density compared with the non-doped specimen. The 0.075 mol% Mg-loaded BSTM ceramic exhibited the highest tunability; this was attributed to the domain-size effect. The loss tangent (tan delta) roughly decreased with Mg loading, due to loaded oxygen vacancies. The maximum figure of merit value (FOM = tunability/tan delta) at 10 MHz was achieved for the 0.075 mol% Mg specimen, twice that of the non-doped specimen, due to an increase in the tunability and a decrease in the loss tangent with Mg loading. (C) 2015 The Japan Society of Applied Physics

    DOI: 10.7567/JJAP.54.011502

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  • Dependence of Power Distribution Network Impedance on Circuits Implemented in Field Programmable Gate Array

    Nobuhiro Tai, Kengo Iokibe, Yoshitaka Toyota, Tetsushi Watanabe, trial Technology Center of Okayama Pre

    Eighth 2015 Korea-Japan Joint Conference on EMT/EMC/BE (KJJC-2015), P-09, Sendai, Japan   85 - 86   2015

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  • 線路接続部で生じるモード変換の等価回路モデル -モデルの妥当性とノイズ抑制に向けた検討-

    豊田啓孝

    電磁環境工学情報EMC   321   85 - 100   2015

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  • Miniaturization of a Planar EBG Structure Using Interdigital Electrodes

    Yuki Yamashita, Yoshitaka Toyota, Kengo Iokibe, Koichi Kondo, Shigeyoshi Yoshida, Toshiyuki Kaneko

    2015 IEEE ELECTRICAL DESIGN OF ADVANCED PACKAGING AND SYSTEMS SYMPOSIUM   39 - 42   2015

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    This paper describes a proposed planar electromagnetic bandgap (EBG) structure whose unit cell size is miniaturized through the use of interdigital electrodes (IDEs). For planar EBG structures in general, it is difficult to miniaturize the cell size independently of stopband frequency because the stopband frequency depends on the cell size. For the proposed structure, however, the cell size can be miniaturized because the IDEs help enlarge the capacitance between adjacent unit cells and utilize a resonator formed in the unit cells. Because the resonator's resonant frequency determines the stopband frequency of an EBG structure with IDEs, the cell size can be miniaturized independently of the stopband frequency. In the work described in this paper, the proposed EBG structure's efficacy in reducing power bus noise was examined and evaluated through full-wave simulation and measurement in the wireless communication band. It was found that an IDE-EBG structure with a small (25 mm(2)) unit cell is a valid means for achieving power bus noise reduction.

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  • Formulation of Mode Conversion in Differential Transmission Lines with Bend Discontinuity

    Keita Takariki, Kengo Iokibe, Yoshitaka Toyota

    2015 IEEE ELECTRICAL DESIGN OF ADVANCED PACKAGING AND SYSTEMS SYMPOSIUM   152 - 155   2015

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    This paper formulates mode conversions of transmission and reflection from differential mode to common mode in differential transmission lines with bend discontinuity using a very simple model. The formulae tell us that the mode conversion is caused by not only the path difference in the bend but also the difference between the characteristic impedance and port impedance. The formulae were validated by full-wave simulation under the assumption that effect of the bend region is small and results showed that path difference reduction and impedance matching at the input and output ports are significant in suppressing mode conversion. This suggests that the tightly coupled asymmetrically tapered bend proposed by the authors should be effective for suppressing mode conversion.

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  • Electromagnetic Immunity Analysis Using Modal-equivalent Circuit in Cable Interconnection System

    Yoshitaka Toyota, Kengo Iokibe, Liuji R. Koga

    2015 ASIA-PACIFIC INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (APEMC)   716 - 719   2015

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    Electromagnetic immunity analysis as well as electromagnetic emission analysis is significant for EMC design. In this paper, we apply a modal equivalent-circuit model with mode-conversion sources to electromagnetic immunity analysis in a simple cable interconnection system. The analysis can treat mode conversion caused by discontinuity in multi-conductor transmission line with circuit analysis and has been validated in electromagnetic emission analysis. The approach takes an advantage in less calculation sources and helps get design considerations compared with full-wave simulation. In this paper, common-mode excitation by a current probe in a simple cable interconnection system is investigated for model validation. As a result, it is demonstrated that the circuit analysis with the modal-equivalent circuit model agrees well with the measurement results.

    DOI: 10.1109/APEMC.2015.7175388

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  • Conducted Disturbance Estimation of Power Converter Circuits Based on Linear Equivalent Circuit Model for EMI Filter Design

    Hiroki Geshi, Kengo Iokibe, Yoshitaka Toyota, Tetsushi Watanabe, trial Technology Center of Okayama Pre

    Eighth 2015 Korea-Japan Joint Conference on EMT/EMC/BE (KJJC-2015), P-11, Sendai, Japan   89 - 90   2015

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  • Optically Pumped Alkali-Meta Atomic Magnetometer using Permanent Magnets for AC Magnetic Field Detection

    Shuji Taue, Masaru Shinohara, Takayuki Nagaoka, Yoshitaka Toyota, Kazuhiro Fujimori, Hideki Fukano

    Eighth 2015 Korea-Japan Joint Conference on EMT/EMC/BE (KJJC-2015), P-15, Sendai, Japan   97 - 98   2015

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  • Security Simulation against Side-Channel Attacks on Advanced Encryption Standard Circuits Based on Equivalent Circuit Model

    Kengo Iokibe, Kazuhiro Maeshima, Tetsushi Watanabe, Yoshitaka Toyota

    2015 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC)   224 - 229   2015

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    An equivalent circuit model was applied to a cryptographic module to simulate the resistance of the module against side-channel attacks. The cryptographic module involved two fiel programmable gate arrays (FPGAs), on which an Advanced Encryption Standard (AES) circuit was implemented on one of them. The equivalent circuit model proposed in the previous literature was improved in terms of the accuracy of model parameters. Resistance against side-channel attacks was simulated in a more practical configuratio with the improved model than that in the previous work. Resistance was simulated with random plaintexts (input values) to the cryptographic circuit, whereas a biased plaintext set was used to simplify simulation. The simulation was carried out with two decoupling configuration for the power distribution network of the FPGA core that the AES circuit was implemented in. The results obtained from simulation confirme that the equivalent circuit model allowed side-channel resistance to be precisely predicted.

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  • サイドチャネル情報漏洩に寄与が大きいAES回路部の内部電流源に基づく検討

    五百旗頭健吾, 田井伸拓, 大西紘之, 籠谷裕人, 豊田啓孝, 渡辺哲史

    情報理論とその応用シンポジウム予稿集(CD-ROM)   38th   2015

  • Flexibility of On-Board RL Snubber for PDN Resonance Damping in terms of Mount Location

    IOKIBE Kengo, TOYOTA Yoshitaka

    IEICE technical report. Electromagnetic compatibility   114 ( 381 )   69 - 74   2014.12

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    RL snubber had been proposed as a method to damp the LC resonance over a power distribution network for digital integrated circuits (ICs). The RL snubber was investigated whether the effect of PDN resonance damping depends on locations at which it was implemented in the surface of a printed circuit board. In this study, RL snubbers was implemented at two locations near and apart from a digital IC on a test board. For each of the two implemented locations, RL snubber was optimized in terms of its component parameters, resistance and inductance. The optimized RL snubbers were applied to damp the PDN resonance reducing the RF power current. It was confirmed according to both circuit simulations and measurements that the two RL snubbers reduced RF power current equally around the resonant frequency, independent on their implemented locations. This means that the RL snubber involves a flexibility of implementation location on a printed circuit board. When you apply an RL snubber to your printed circuit board, you can place it in any room flexibly in response to your design.

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  • Investigation of Position to Install a Capacitor to Power Distribution Network for Suppressing Mode Conversion

    MIKURA Toshiki, TOYOTA Yoshitaka, IOKIBE Kengo

    IEICE technical report. Electromagnetic compatibility   114 ( 214 )   5 - 10   2014.9

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    The discontinuity in multiple transmission line, i.e. the change in cross-sectional structure of the trace causes mode conversion. This suggests that normal-mode noise propagation generate common-mode noise by mode-conversion at the discontinuity and then lead to the electromagnetic interference (EMI). Focusing on power distribution network, rf noise caused by switching in a DC-DC converter is becoming a severe problem and hence it is required to consider how to suppress EMI efficiently. Mode conversion occurs at the discontinuity in transmission line where the common-mode electromotive source is excited in proportion to the normal-mode voltage. Different from the signal trace, a capacitor can be installed to the power distribution network to efficiently reduce normal-mode voltage at high frequency. In this paper, the distance between the installed capacitor and the connector where the discontinuity in transmission line occurs are changed to investigate the reduction of the normal-mode voltage in the vicinity of a connector and its relationship with the reductions of common-mode current and far electric field. As a result, it is found that mode conversion is more suppressed by installing the capacitor near the connector than the DC-DC convertor as a noise source to reduce common-mode current and far electric field.

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  • B-4-42 Fabrication of Tightly Coupled Asymmetrically Tapered Bend in Differential Transmission Lines and Its Evaluation in Mode-conversion Suppression

    Kan Shohei, Toyota Yoshitaka, Iokibe Kengo

    Proceedings of the Society Conference of IEICE   2014 ( 1 )   269 - 269   2014.9

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  • Fabrication and Evaluation of Lossy Resonator Filter Consisting of Open Stub Covered with Ferrite Thin Film

    TOYOTA Yoshitaka, IOKIBE Kengo, KONDO Koichi, YOSHIDA Shigeyoshi

    IEICE technical report. Electromagnetic compatibility   114 ( 135 )   7 - 12   2014.7

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    A lossy resonator filter was proposed for suppressing noise propagation in the power-ground plane pair of a printed circuit board (PCB) at high frequencies over 1 GHz. The lossy resonator filter has an advantage of frequency selectivity because the frequency band to suppress noise propagation is specified by changing the resonant frequency of the resonator included. Also, the suppressed noise does not regenerate owing to a loss given to the resonator. In this paper, the lossy resonator filter was fabricated by covering the open stubs with a ferrite thin film on a PCB. Then, its characteristics were verified by evaluating the transmission coefficient through full-wave simulation and measurement using a vector network analyzer. The measurement and simulation results show that the noise in the power bus of the PCB at frequencies over 1 GHz is suppressed. Even in the case that the power bus is inside the board, noise propagation in the power bus was suppressed by connecting the inside ground plane and the ground plane of the lossy resonator filter by vias in order to conduct the noise to the filter.

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  • Comparison of Electromagnetic Injection Configurations in terms of Induced Disturbance Observed near Integrated Circuit on Board

    MAESHIMA Kazuhiro, IOKIBE Kengo, WATANABE Tetsushi, TOYOTA Yoshitaka

    IEICE technical report. Electromagnetic compatibility   114 ( 129 )   31 - 36   2014.7

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    In this paper, the authors observed noise induced by electromagnetic disturbance injection in several experimental configurations. The noise was measured on a printed circuit board (PCB) as voltage variations of DC bias and the clock signal. The noise observation is in the course of understanding how the disturbance is conducted into the PCB in the immunity test. The experimental system here consisted of an electrical fast transient/ burst (EFT/B) generator, a coupler and a PCB implementing FPGAs. A Coupling Decoupling Network (CDN) or a current probe was used as the coupler. Experimental results indicated that positive pulse injection fluctuated the power bias voltage of the FPGA and that noise waveforms were varied with the coupler. The waveform variation with coupler suggested that it changed the input impedance of the experimental system at the EFT/B generator. It is also observed that a grounding vanished an oscillating noise in a constant frequency when the PCB ground was shunted to the system ground.

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  • Investigation on Aes Circuits in Information-Leaking-Behavior by Means of Internal Equivalent Current Source

    TAI Nobuhiro, IOKIBE Kengo, KAGOTANI Hiroto, OONISHI Hiroyuki, MAESHIMA Kazuhito, TOYOTA Yoshitaka, WATANABE Tetsushi

    IEICE technical report. Electromagnetic compatibility   114 ( 93 )   13 - 18   2014.6

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    In our previous study, we identified an internal equivalent current source representing the internal switching current of a cryptographic IC that occurred as the IC operated an encryption operation. Since the internal switching current is the source of information leakage, the internal equivalent current source is expected to be able to be applied to evaluate cryptographic ICs in security of side-channel attack. In this study, we investigated the internal equivalent current source with regard to its behavior as the source of information leakage. The investigation revealed that variance of the switching current varied temporally in a round operation and that the AES circuit with a hiding countermeasure provided information leakage at the moment when the variance was smaller than that in the remaining time period. This suggested that cryptographic circuits can be analyzed of their behavior as the information leakage source according to the internal equivalent current source.

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  • Simulation of Unintentional Radiated Emission with Common-mode Antenna Model Taking into Account Mode Conversion between Normal and Common Modes

    WAKADUKI Yuri, TOYOTA Yoshitaka, IOKIBE Kengo, KOGA Liuji R., WATANABE Tetsusi

    114 ( 69 )   29 - 34   2014.5

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    We have developed a common-mode antenna model for estimating unintentional radiated emission (common-mode radiation) taking into account mode conversion between normal and common modes on a printed circuit board. The common-mode antenna model is a equivalent antenna model with electromotive forces caused by the difference in the imbalance factors of the transmission lines. Normal-mode voltage used for the antenna model is calculated by transmission-line analysis with modal equivalent-circuit models. There is still a problem that the iterative analysis we have proposed provides insufficient accuracy in less iteration and needs more calculation time in more iteration. In this paper, we proposed the simultaneous analysis of the modal equivalent-circuit models. The proposed method provided more accurate result than the conventional one. In particular, the simulation results by the proposed method matched those by the real structure model within an error of 1 dB around the maximum radiation.

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  • Tightly Coupled Asymmetrically Tapered Bend for Suppressing Mode Conversion Generated at Bend in Differential Transmission Lines

    KAN Shohei, TOYOTA Yoshitaka, IOKIBE Kengo, WATANABE Tetsushi

    IEICE technical report. Electromagnetic compatibility   113 ( 423 )   27 - 32   2014.1

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    The bend in a pair of differential lines on printed circuit boards causes the path difference, which leads to the phase difference in signal propagation on each signal line and then results in mode conversion. This paper proposes a bend structure to suppress differential-to-common mode conversion by modifying the tightly coupled tapered bend so that the asymmetrical taper cancels the path difference remained at the tightly coupled bend. As a result, the amount of mode conversion was reduced by approximately 23 dB compared to the symmetrical taper. In addition, the reflect ion on differential mode was reduced by approximately 10 dB because the two-section asymmetrical taper can make the differential-mode characteristic impedance almost constant.

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  • Power-bus Noise Reduction Using Ferrite-covered Open Stub in Printed Circuit Board

    Yoshitaka Toyota

    2014 IEEE CPMT SYMPOSIUM JAPAN (ICSJ)   79 - 82   2014

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    For suppressing the power-bus resonance at higher frequencies, which causes propagation of electromagnetic noise and detraction of power integrity, we proposed a lossy resonator filter with frequency selectivity and low loss. To suppress noise propagation in the power-ground plane pair of a printed circuit board (PCB) at high frequencies (over 1 GHz), a ferrite-covered open stub was formed on a PCB as a lossy resonator filter. Its characteristics were verified by not only full-wave simulation but also measurement using a vector network analyzer. The simulation and measurement results show that the noise in the power bus of the PCB at frequencies over 1 GHz is suppressed. Through a series of investigations focusing on the input impedance characteristics, this paper clarified that low impedance of the open stub around resonant frequency helps prevent the impedance of the power-ground plane pair from increasing due to parallel plate resonances to achieve power-bus noise reduction.

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  • Suppression of noise propagation between power and ground planes using ferrite-plated EBG structure

    K. Kondo, S. Yoshida, Y. Toyota

    Funtai Oyobi Fummatsu Yakin/Journal of the Japan Society of Powder and Powder Metallurgy   61   S299 - S302   2014

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    To confirm the feasibility of suppressing electromagnetic interference (EMI) in the inner layers of multilayered printed wiring boards (PWBs) and sustaining power integrity characteristics, influence of inserting a ferrite-plated thin film between the power and ground planes on the transmission characteristics were evaluated using four types of test boards with the following two conditions: one is the solid test board with a plane copper foil or the EBG (Electromagnetic bandgap) test boards with a one-dimensional lattice-shaped EBG structure consisting of large and small squares 15 mm x 15 mm and 1.5 mm x 1.5 mm in size
    the other is whether the 3 or 6 μm-thick ferrite film was deposited or not. The multiple peaks of the transmission coefficient S21 due to parallel plate resonances were observed in the solid test board without ferrite film but the peaks were suppressed over the wide frequency range up to 6 GHz by applying the ferrite film. The EBG test board with the ferrite film provided not only wideband attenuation owing to the ferrite film but also large attenuation in the EBG stopband. The multiple peaks of in the driving point impedance Z11 due to the parallel plate resonances were also successfully suppressed by applying the ferrite film exhibiting favorable power integrity characteristics.

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  • Suppression of Mode Conversion by Decreasing Path Difference by using an Asymmetrically Tapered Bend in Differential Transmission Lines

    Shohei Kan, Yoshitaka Toyota, Kengo Iokibe, Tetsushi Watanabe

    2014 INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, TOKYO (EMC'14/TOKYO)   129 - 132   2014

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    A tightly coupled asymmetrically tapered bend to suppress differential-to-common-mode conversion (caused by bend discontinuity in a pair of differential transmission lines) is proposed. A tightly coupled tapered bend has been proposed to suppress the mode conversion by decreasing the path difference in the bend. The tightly coupled bend with symmetric tapers makes the path difference shorter so that the differential transmission lines are coupled more tightly, but a path difference of twice the line separation still remains. To decrease the remaining path difference, a pair of asymmetric tapers is proposed. A full-wave simulation demonstrated that the amount of differential-to-common-mode conversion was decreased by 29 dB compared to that of the symmetrically tapered bend. To suppress differential-mode reflection, furthermore, a tightly coupled bend with sectionally divided asymmetric tapers is suggested.

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  • Analysis on Equivalent Current Source of AES-128 Circuit for HD Power Model Verification

    Kengo Iokibe, Kazuhiro Maeshima, Hiroto Kagotani, Yasuvuki Nogami, Yoshitaka Toyota, Tetsushi Watanabe

    2014 INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, TOKYO (EMC'14/TOKYO)   302 - 305   2014

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    We analyzed equivalent current source of cryptographic circuits implemented on a field programmable gate array (FPGA). The equivalent current source represented internal switching current behaviors in the cryptographic circuits during an Advanced Encryption Standard (AES) operation. In this work, the internal current was analyzed for extracting leakage functions and correlation coefficients from scatter diagrams of the Hamming Distance (HD) of AES intermediate values and the current magnitudes. The obtained leakage functions were confirmed a well-known assumption on the HD power model that magnitude of switching current due to transition of register states is proportional to HD of the register. The internal current was also investigated in terms of correlation with the HD model. Correlation coefficients increased as transforming the external power trace in the internal current because two types of noise were reduced by the transform; constant noise and overlap effect of successive rounds. The noise reduction inferred that the use of the internal current source would provide more precise verification of countermeasures.

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  • ディジタルIC電源供給回路へのRLスナバ適用による伝導性電磁雑音低減及び電源品質改善

    五百旗頭健吾, 山縣亮介, 豊田啓孝

    電子情報通信学会論文誌B   J97-B ( 7 )   497 - 506   2014

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  • Modal Equivalent Circuit of Bend Discontinuity in Differential Transmission Lines

    Yoshitaka Toyota, Shohei Kan, Kengo Iokibe

    2014 INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, TOKYO (EMC'14/TOKYO)   117 - 120   2014

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    The equivalent-circuit expression of bend discontinuity in differential transmission lines, which is derived from the view of the mode-decomposition technique, is proposed in this paper. We investigated the relationship between the amount of mode conversion in the bend region and two components in the modal equivalent circuit: the mode-conversion sources and the modal reactances (modal inductances and capacitances). As a result, it was found that not only the difference in the imbalance factor but also the magnitude of the modal reactances can have a lot of effect on the mode conversion.

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  • Ferrite-covered Open Stub as Lossy Resonator Filter for Suppressing Noise Propagation in Power Bus

    Yoshitaka Toyota, Kengo Iokibe, Koichi Kondo, Shigeyoshi Yoshida

    2014 INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC EUROPE)   765 - 769   2014

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    A lossy resonator filter with frequency selectivity and low loss, which suppresses noise propagation in the power-ground plane pair of a printed circuit board (PCB) at high frequencies (over 1 GHz), was fabricated and evaluated. A ferrite-covered open stub was formed on a PCB as a lossy resonator filter, and its characteristics were verified by measurement using a vector network analyzer as well as full-wave simulation. The measurement and simulation results show that the noise in the power bus of the PCB at frequencies over 1 GHz is suppressed. Even in the case that the power bus is inside the board, noise propagation in the power bus was suppressed by connecting the inside ground plane and the ground plane of the lossy resonator filter by vias in order to conduct the noise to the filter.

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  • Guard Trace with Periodic Structure for Reducing Common-mode Radiation and Maintaining Signal Integrity

    Yuho Terai, Yoshitaka Toyota, Kengo Iokibe, Tetsushi Watanabe

    2014 INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, TOKYO (EMC'14/TOKYO)   545 - 548   2014

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    The guard trace is effective for suppressing common-mode generation caused by placing a signal trace close to the return edge on a printed circuit board. Our previous studies on the guard trace focused only on a design methodology for reducing common-mode radiation, but the placing guard trace close to the signal line increases crosstalk to deteriorate signal integrity. A guard trace with a periodic structure is therefore proposed for simultaneously reducing common-mode radiation and maintaining signal integrity. Several test boards with different period patterns were evaluated by measurement and full-wave simulation from the viewpoint of transmission coefficient as well as common-mode radiation. As a result, it was found that the guard trace with the periodic structure helps reduce common-mode radiation and maintain signal integrity except for a couple of conditions.

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  • Suppression of noise propagation between power and ground planes using ferrite-plated EBG structure

    K. Kondo, S. Yoshida, Y. Toyota

    Funtai Oyobi Fummatsu Yakin/Journal of the Japan Society of Powder and Powder Metallurgy   61 ( S1 )   S299 - S302   2014

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    To confirm the feasibility of suppressing electromagnetic interference (EMI) in the inner layers of multilayered printed wiring boards (PWBs) and sustaining power integrity characteristics, influence of inserting a ferrite-plated thin film between the power and ground planes on the transmission characteristics were evaluated using four types of test boards with the following two conditions: one is the solid test board with a plane copper foil or the EBG (Electromagnetic bandgap) test boards with a one-dimensional lattice-shaped EBG structure consisting of large and small squares 15 mm x 15 mm and 1.5 mm x 1.5 mm in size
    the other is whether the 3 or 6 μm-thick ferrite film was deposited or not. The multiple peaks of the transmission coefficient S21 due to parallel plate resonances were observed in the solid test board without ferrite film but the peaks were suppressed over the wide frequency range up to 6 GHz by applying the ferrite film. The EBG test board with the ferrite film provided not only wideband attenuation owing to the ferrite film but also large attenuation in the EBG stopband. The multiple peaks of in the driving point impedance Z11 due to the parallel plate resonances were also successfully suppressed by applying the ferrite film exhibiting favorable power integrity characteristics.

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  • Guard Trace with Periodic Structure Taking Signal Integrity into Account

    Yoshitaka Toyota, Kengo Iokibe, Tetsushi Watanabe

    2014 IEEE ELECTRICAL DESIGN OF ADVANCED PACKAGING & SYSTEMS SYMPOSIUM (EDAPS)   45 - 48   2014

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    The guard trace is effective for suppressing common-mode generation caused by placing a signal trace too close to the return edge on a printed circuit board. In our previous study, a guard trace with a periodic structure was proposed not only to reduce common-mode radiation but also to maintain signal integrity and was found to be effective. In the current work, the shape of the periodic structure and the termination at both edges to improve the features was investigated through full-wave simulation and measurement from the viewpoint of transmission coefficient as well as far-field radiation. Results show that the smaller the widths of the narrow portion, the further the periodic structure helps reduce common-mode radiation and maintain signal integrity. Also shown is that the periodic guard trace with both ends connected to the return plane is an appropriate structure.

    DOI: 10.1109/EDAPS.2014.7030811

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  • Modal-equivalent-circuit Modeling of Bend Discontinuity of Differential Transmission Lines

    TOYOTA Yoshitaka, KAN Shohei, IOKIBE Kengo, WATANABE Tetsushi

    IEICE technical report. Electromagnetic compatibility   113 ( 310 )   41 - 46   2013.11

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    The bend in a differential transmission line is expressed as a modal equivalent circuit from the view of the mode-decomposition technique. Then, we investigated the relationship of the mode-conversion sources inside the bend and the neighboring reactive elements with the amount of mode conversion. It was found that not only the difference in imbalance factor but also the magnitude of the reactive elements ccan affect mode conversion.

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  • Application of LECCS Model to Predict on-Board Power Voltage Variation of FPGA

    SHIMIZU Kana, IOKIBE Kengo, TOYOTA Yoshitaka, WATANABE Tetushi

    IEICE technical report. Microwaves   113 ( 260 )   163 - 168   2013.10

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    In this study, an equivalent circuit model of a field programmable gate array (FPGA) implemented on a commercial printed circuit board was identified. The model, called Linear Equivalent Circuit and Current Source (LECCS) model, was applied to predict the power supply voltage variations due to high-frequency current of the FPGA. The LECCS model was identified from on-board measurements. Then, the power supply voltage variation was calculated by a circuit simulation with the identified LECCS and PDN equivalent circuit model. In this study, the predictions of the power supply voltage variation were verified for 1000 input data. As a result, cross-correlation values between measured and simulated voltage waveforms were 0.8 or more for all the 1,000 input data. This means that LECCS model can predict the power supply voltage variation including input data dependency.

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  • Simulation of Side-Channel Attack at Board Level by Use of Equipment Circuit Model

    Iokibe Kengo, Toyota Yoshitaka

    Proceedings of the Society Conference of IEICE   2013 ( 1 )   "SS - 36"-"SS-37"   2013.9

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  • Design Method of On-Board RL Snubber Inserted in Power Distribution Network of Integrated Circuits

    YAMAGATA Ryosuke, IOKIBE Kengo, TOYOTA Yoshitaka

    IEICE technical report. Electromagnetic compatibility   113 ( 122 )   39 - 43   2013.7

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    The power distribution network (PDN) of modern integrated circuits (ICs) have parasitic impedances along power and ground traces, vias, and components as well as nominal impedances of the components: capacitors, voltage regulators, filters, and ICs. Such parasitic impedances, at the resonant frequency, may increase the radio frequency (RF) power current to cause conducted EM radiation and surge the PDN input impedance to induce power bounces. There is the RL snubber circuit that had been applied to a typical PDN decreasing the RF power current and descending the PDN input impedance by damping the parasitic impedance resonance. The RL snubber is composed of a parallel pair of decoupling inductor and damping resister. This report introduced a design method of the RL snubber for the parasitic impedance resonance of on-board parasitic capacitances.In the design method, the allowable range of the decoupling inductance was restricted for practical use of the method to simplify the equivalent circuit that expressed the target resonance. The simplified equivalent circuit was a 2nd order circuit whereas the original one was 3rd order.With the restricted inductance, an optimal resistance was determined in accordance with the critical damping conditions of the 2nd order circuit. Finally, the design method was evaluated on the basis of the circuit simulation calculating the current transmittance and PDN input impedance. As a result, the introduced design method was confirmed to reduce as much RF power current and power bounce as the more thetically strict way. Moreover, the method was found to be able to be more practical by relaxing the restriction on the decoupling inductance of RL snubber.

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  • Suppression of Power-bus Resonance Using Lossy Resonator Filter Consisting of Open Stub and Magnetic Thin Film

    TOYOTA Yoshitaka, IOKIBE Kengo, KONDO Koichi, YOSHIDA Shigeyoshi

    IEICE technical report. Electromagnetic compatibility   113 ( 25 )   25 - 30   2013.5

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    Power-bus resonance of printed circuit board (PCB) causes propagation of electromagnetic noise and detraction of power integrity. For suppressing the power-bus resonance, the following two aspects are important: suppression of power-bus resonances focusing only on each specific resonance; reduction of the resonant energy stored between the power and ground planes. In this paper, we propose a lossy resonator filter consisting of an open stub covered with a magnetic thin film. This paper first explains the concepts of the proposed filter, especially focusing on the impedance characteristics, and then demonstrates that the proposed filter suppress power-bus resonances effectively by full-wave simulation.

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  • Quantitative estimation of total EMI radiation with normal-mode and common-mode antenna models

    WATANABE Tetsushi, WAKADUKI Yuri, TOYOTA Yoshitaka, IOKIBE Kengo

    IEICE technical report. Electromagnetic compatibility   113 ( 2 )   7 - 12   2013.4

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    The currents of two modes, normal mode and common mode flow along two-conductor lines placed in the air. We have so far developed the prediction method of common-mode current and radiation in a printed circuit board focusing on the imbalance of the transmission line. The difference of the imbalances causes the mode conversion, from normal mode to common mode. In this paper, it is examined that the vector sum of common-mode radiation and normal-mode radiation should be equal to total radiation. Each modal radiation is calculated separately with the corresponding equivalent model. The modeling method is applied to three kinds of printed-circuit-board structures. It is validated that the far electric field from the real-structure model agrees with the vector sum of far electric fields from normal-mode and common-mode equivalent models.

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  • Reduction in Common-mode Radiation and Maintenance of Signal Integrity by Adding Guard Trace with Periodic Structure

    TERAI Yuho, TOYOTA Yoshitaka, IOKIBE Kengo, WATANABE Tetsushi

    IEICE technical report. Electromagnetic compatibility   113 ( 2 )   1 - 6   2013.4

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    The guard trace is effective as a method for suppressing common-mode generation caused by placing a signal trace close to the return edge on a printed circuit board. Our previous study on the guard trace focused only on reducing common-mode radiation, but the guard trace close to the signal line increases crosstalk to deteriorate signal integrity. In this paper, we propose a guard trace with a periodic structure for simultaneously reducing common-mode radiation and maintaining signal integrity. Several test boards with different period patterns were evaluated by measurement and simulation from the viewpoint of transmission coefficient, eye pattern, and common-mode radiation. As a result, it was found that the guard trace with the periodic structure helped reducing common-mode radiation and maintaining signal integrity. Especially, smaller period contributed to maintenance of signal integrity at higher frequencies.

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  • Noise Investigation of Cryptographic ICs for Side-Channel Analysis by Means of Equivalent Current Source Model : A Study with SASEBO-G

    IOKIBE Kengo, AMANO Tetsuo, TOYOTA Yoshitaka, WATANABE Tetsushi

    IEICE technical report. Electromagnetic compatibility   113 ( 2 )   25 - 30   2013.4

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    It is an important issue to predict noise in cryptographic integrated circuits (ICs) in developing security design methodologies against side-channel analysis attacks, because the noise prediction can affect the reliability of safety estimation of cryptographic devices against side-channel analysis attacks. The noise in cryptographic ICs varies during an encryption operation and is difficult to be identified from measurements. The noise variation was investigated by means of the equivalent current source model of a cryptographic FPGA that the authors determined in their previous studies. Standard deviations of the noise was calculated for a couple of plaintexts of the Advanced Encryption Standard (AES) with a 128-bit key. The standard deviations were found positively correlated with the magnitude of the equivalent current source.

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  • B-4-58 Identification of Equivalent Current Source of Cryptographic FPGA for Side-Channel Attack Simulations

    Iokibe Kengo, Okamoto Kaoru, Amano Tetsuo, Toyota Yoshitaka, Watanabe Tetsushi

    Proceedings of the IEICE General Conference   2013 ( 1 )   403 - 403   2013.3

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  • B-4-36 Relationship of Mode Conversion with lmbalance Factor and Voltage Reflection Coefficient

    NOBUNAGA Tatsuya, TOYOTA Yoshitaka, IOKIBE Kengo, KOGA Liuji R., WATANABE Tetsushi

    Proceedings of the IEICE General Conference   2013 ( 1 )   381 - 381   2013.3

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  • Optimization of Resistances in RL Snubbers for Power Distribution Network of Integrated Circuits

    Ryosuke Yamagata, Kengo Iokibe, Yoshitaka Toyota

    Proceedings of 2013 International Symposium on Electromagnetic Theory (EMTS 2013)   226 - 229   2013

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  • Equivalent circuit modeling of cryptographic integrated circuit for information security design

    Kengo Iokibe, Tetsuo Amano, Kaoru Okamoto, Yoshitaka Toyota

    IEEE Transactions on Electromagnetic Compatibility   55 ( 3 )   581 - 588   2013

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    In this study, equivalent circuit modeling was examined to develop a method to evaluate cryptographic systems before fabrication. An equivalent circuit model of a cryptographic FPGA in which an advanced encryption standard (AES) algorithm had been implemented was determined from experimental measurements under the initial configuration of a power distribution network (PDN) of the FPGA. The model was implemented into a commercial analog circuit simulator, and power traces due to the simultaneous switching noise current were estimated under three different PDN configurations in which a decoupling circuit was inserted into the PDN as an on-board countermeasure. Estimated power traces were analyzed statistically by the correlation power analysis method to obtain correlation values, a major security index of AES. Variation of the correlation values with changes in decoupling configuration agreed with the corresponding experimental results. This means that the security of cryptographic devices against side-channel attacks can be evaluated by using the equivalent circuit model before fabrication. © 1964-2012 IEEE.

    DOI: 10.1109/TEMC.2013.2250505

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  • Evaluation of Pigtail Termination of STP cable Using Modal Equivalent Circuit of Four-conductor Transmission Systems

    Tatsuya Nobunaga, Yoshitaka Toyota, Kengo Iokibe, Liuji R. Koga, Tetsushi Watanabe

    PROCEEDINGS OF 2013 URSI INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC THEORY (EMTS)   222 - 225   2013

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    For investigating mode conversion in four-conductor transmission systems we have developed a modal-equivalent-circuit expressed by an imbalance factor of transmission line, a current division factor, in the same way as we developed the one in three-conductor transmission systems. The modal equivalent circuit consists of three modal equivalent circuits of normal mode, primary-common mode, and secondary-common mode. In this paper, the influence of mode conversion by the pigtail termination of a shielded-twisted-pair (STP) cable was analyzed using the modal equivalent circuit and mixed-mode S parameters with respect to normal mode and primary- common mode. As a result, it was found that mode conversion depends on the imbalance factor and that the modal equivalent circuit helps to explain mode conversion that occurs in terminating STP cables with pigtail.

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  • RF Noise Suppression by Lossy Filters in Power Distribution Network

    Yoshitaka Toyota, Kengo Iokibe

    Proceedings of IEEE CPMT Symposium Japan (ICSJ 2013)   2013

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  • Effect of EBG structure and ferrite film on power/ground layers for performance maintenance and noise suppression in wireless communication

    Kenta Ishimura, Yoshitaka Toyota, Kengo Iokibe, Koichi Kondo, Shigeyoshi Yoshida

    EDAPS 2013 - 2013 IEEE Electrical Design of Advanced Packaging Systems Symposium   217 - 220   2013

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    Noise suppression and power integrity are two requirements for power/ground layers of printed circuit boards. To accomplish the requirements, we proposed the application of electromagnetic bandgap (EBG) structure and ferrite film to power/ground layers. To evaluate the proposed EBG structure, we have so far measured the electric characteristics of both driving-point impedance and transmission coefficient. Although these evaluation indices are helpful, the evaluation using an actual device is also indispensable. In this paper, we evaluated the suppression of noise propagation through power bus by the proposed EBG structure in wireless communication module. The proposed structure provided sufficient result of the effective maintenance of communication quality by suppressing the propagation of electromagnetic noise. © 2013 IEEE.

    DOI: 10.1109/EDAPS.2013.6724428

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  • Improvement of Linear Equivalent Circuit Model to Identify Simultaneous Switching Noise Current in Cryptographic Integrated Circuits

    Kengo Iokibe, Tetsuo Amano, Kaoru Okamoto, Yoshitaka Toyota, Tetsushi Watanabe

    2013 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC)   834 - 839   2013

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    The authors previously proposed a method based on a linear equivalent circuit model to predict vulnerability of cryptographic devices before fabrication. The method was verified to demonstrate the correlation power analysis attack, a major side-channel attack method, to a cryptographic device with outstanding accuracy. However, no obvious correlation was seen between the equivalent current source modeling the generation of the simultaneous switching noise (SSN) current in the circuit model and the encryption operation used in the previous study. Therefore, in this study, we improved the topology of the linear equivalent circuit model matched with the physical construction of the power distribution network (PDN) and re-identified the equivalent current source. By comparing the improved current source with the encryption operation, obvious correlations between them were found with respect to the period of the round operation and the dependency of the SSN current on the Hamming distance between successive intermediates. The improved equivalent current source was applied on a Field-Programmable Gate Array (FPGA) in which an Advance Encryption Standard (AES) circuit was implemented to simulate power traces that were confirmed to coincide with measured ones. Correlation between the simulated power traces and the power model was investigated using a set of 1000 plaintexts. As a result, the correlation coefficients agreed well with those for measured power traces. Improving the equivalent circuit model topology, thus, helped to identify the SSN current generated in the FPGA during the AES operation.

    DOI: 10.1109/ISEMC.2013.6670526

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  • Suppression of Power-bus Resonance by Lossy Resonator Filter Consisting of Open Stub and Magnetic Thin Film

    Yoshitaka Toyota, Kengo Iokibe, Koichi Kondo, Shigeyoshi Yoshida, NEC TOKIN Corporatio

    Proceedings of 2013 International Symposium on Electromagnetic Compatibility (EMC Europe 2013)   943 - 948   2013

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  • Electromagnetic Simulation of Printed Circuit Board Adjacent to Conductor Using Equivalent Model Focusing on Common-mode

    Yuli Wakaduki, Yoshitaka Toyota, Kengo Iokibe, Ryuji Koga, Tetsushi Watanabe, strial Technology Center of Okayama Pre

    Proceedings of 13th International Symposium on Electronics Packaging (ICEP2013)   707 - 712   2013

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  • モード等価回路を用いた非一様媒質中伝搬の回路シミュレーションとその適用範囲

    瀬島孝太, 豊田啓孝, 五百旗頭健吾, 古賀隆治, 渡辺哲史, 岡山県工技セン

    電子情報通信学会論文誌B   J96-B ( 4 )   389 - 397   2013

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  • Improvement of Linear Equivalent Circuit Model to Identify Simultaneous Switching Noise Current in Cryptographic Integrated Circuits

    Kengo Iokibe, Tetsuo Amano, Kaoru Okamoto, Yoshitaka Toyota, Tetsushi Watanabe

    2013 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC)   834 - 839   2013

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    The authors previously proposed a method based on a linear equivalent circuit model to predict vulnerability of cryptographic devices before fabrication. The method was verified to demonstrate the correlation power analysis attack, a major side-channel attack method, to a cryptographic device with outstanding accuracy. However, no obvious correlation was seen between the equivalent current source modeling the generation of the simultaneous switching noise (SSN) current in the circuit model and the encryption operation used in the previous study. Therefore, in this study, we improved the topology of the linear equivalent circuit model matched with the physical construction of the power distribution network (PDN) and re-identified the equivalent current source. By comparing the improved current source with the encryption operation, obvious correlations between them were found with respect to the period of the round operation and the dependency of the SSN current on the Hamming distance between successive intermediates. The improved equivalent current source was applied on a Field-Programmable Gate Array (FPGA) in which an Advance Encryption Standard (AES) circuit was implemented to simulate power traces that were confirmed to coincide with measured ones. Correlation between the simulated power traces and the power model was investigated using a set of 1000 plaintexts. As a result, the correlation coefficients agreed well with those for measured power traces. Improving the equivalent circuit model topology, thus, helped to identify the SSN current generated in the FPGA during the AES operation.

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  • 新・回路レベルのEMC設計1 伝送系、システム系、CADから見た回路レベルEMC設計

    浅井秀樹, 豊田啓孝, 佐々木伸一, 住永伸

    電磁環境工学情報EMC   26 ( 4 )   120 - 128   2013

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  • Mode Conversion Caused by Discontinuity in Transmission Line From Viewpoint of Imbalance Factor and Modal Characteristic Impedance

    Yoshitaka Toyota, Kengo Iokibe, Liuji R. Koga

    2013 IEEE ELECTRICAL DESIGN OF ADVANCED PACKAGING AND SYSTEMS SYMPOSIUM (EDAPS)   52 - 55   2013

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    For treating mode conversion caused by discontinuity in multi-conductor transmission line with circuit analysis, we have proposed a modal equivalent-circuit model with mode-conversion sources. The approach takes an advantage in less calculation sources and countermeasure consideration compared with full-wave simulation. A mode-decomposition technique was applied with an imbalance factor, that is, the current division factor in our study, of the transmission line. In the modal circuit analysis we proposed, mode conversion is expressed by the controlled sources of which magnitude is proportional to the difference between the current division factors of the adjacent transmission lines. In this paper, we focused on the modal transfer power and derived the mathematical expressions of the mode conversion using the modal characteristic impedance as well as the current division factor. For validating the derived equations, in addition, the comparison with full-wave simulation was carried out and a good agreement was confirmed.

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  • Estimation of Data-Dependent Power Voltage Variations of FPGA by Equivalent Circuit Modeling from On-Board Measurements

    Kengo Iokibe, Yoshitaka Toyota

    2013 9TH INTERNATIONAL WORKSHOP ON ELECTROMAGNETIC COMPATIBILITY OF INTEGRATED CIRCUITS (EMC COMPO 2013)   175 - 179   2013

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    An equivalent circuit model was evaluated in simulating data-dependent power voltage variations of a field-programmable gate array (FPGA). The equivalent circuit model was Linear Equivalent Circuit and Current Source (LECCS) model representing dynamic switching current inside the FPGA with an equivalent current source. The current source was supposed to depend on input data for the FPGA on which a cryptographic circuit was implemented. Model identification was based on the procedure of LECCS model identification from on-board measurements and the current source was identified for all values of input data used in this work. The identified current source was investigated in accordance with the operation process of the cryptographic circuit and found an excellent correlation to the operation process. The identified LECCS model was combined with an equivalent circuit of the power distribution network for the FPGA core circuit to simulate power voltage variations for the 1,000 input texts. The simulated variation waveforms were compared to the corresponding measured ones to evaluate the LECCS model. Results indicated that the simulated and measured power variations matched excellently for all input data with high cross-correlation coefficients from 0.7 to 0.9. LECCS model is, therefore, able to predict the data-dependent power voltage variation by combining a PDN equivalent circuit.

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  • Safety Estimates of Cryptographic Modules against On-Board Side-Channel Attacks by Use of EMC Macro-Model

    IOKIBE Kengo, AMANO Tetsuo, OKAMOTO Kaoru, TOYOTA Yoshitaka, WATANABE Tetsushi

    IEICE technical report. Electromagnetic compatibility   112 ( 361 )   87 - 94   2012.12

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    In this study, EMC-macro modeling was examined to develop a method to evaluate cryptographic systems before fabrication. A EMC-macro model of a cryptographic FPGA in which an AES algorithm had been implemented was determined from experimental measurements under the initial configuration of a power distribution network (PDN) of FPGA. The model was implemented into a commercial analog circuit simulator and side-channel traces due to the SSN current was estimated under three different PDN configurations under which a decoupling circuit was inserted into the PDN as a countermeasure. Estimated side-channel traces were analyzed statistically by the correlation power analysis (CPA) method to obtain correlation values, a major security index of AES. Variation of the correlation values with changes in decoupling configuration agreed with the corresponding experimental results. This means that security of cryptographic devices against side-channel attacks can be evaluated by using the equivalent circuit model before fabrication.

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  • Preliminary Study Using Full-wave Simulation with Respect to Circuit Expression of Mode Conversion Due to Imbalance Difference Between Transmission Lines

    TOYOTA Yoshitaka, WAKADUKI Yuli, IOKIBE Kengo, KOGA Liuji, WATANABE Tetsushi

    IEICE technical report. Electromagnetic compatibility   112 ( 256 )   43 - 48   2012.10

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    We have proposed two equivalent models taking into account mode conversion due to imbalance difference between transmission lines. This paper describes preliminary study to unify the models. The equivaent models are evaluated by comparing the results by full-wave simulation. From the study, it was found that the validity of the models degrades other than assumed conditions. One model called common-mode antenna model overestimated common-mode radiation when a test board is close to the system ground. This is because the model eliminates mode conversion from common mode to normal mode. The other model, modal-equivalent-circuit model including mode-conversion sources, did not provide accurate solution when radiation loss of the test board is large.

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  • B-4-50 Suppression of Power-bus Resonance by Quarter-wavelength Resonator with Loss

    Mahmood Farhan Zaheed, Toyota Yoshitaka, Iokibe Kengo

    Proceedings of the Society Conference of IEICE   2012 ( 1 )   346 - 346   2012.8

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  • Linear Equivalent Circuit Modeling of Power Converter Circuit for Conducted Disturbance Estimation : Determination of Model Parameters by Use of Dual Port LISN

    INOUE Shuhei, IOKIBE Kengo, TOYOTA Yoshitaka, WATANABE Tetsushi

    IEICE technical report. Electromagnetic compatibility   112 ( 100 )   17 - 22   2012.6

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    A reduction design of conducted disturbance from power converter circuits is becoming more important as electronic devices are requiring much more power efficiency. Conducted disturbance must meet domestic and international regulations. In this paper, a linear equivalent circuit model on the basis of a EMC macro-model of IC/LSI, LECCS model, is investigated to predict the conducted disturbance of power converter circuits. The dual-port LISN (DP-LISN) constructed to provide the model is also reported. In the study, an commercial table-top induction heater is used as the equipment under test. Conducted disturbance voltages were measured with 10 different load pairs of the DP-LISN. Model parameters were then determined by the least square method with the conducted disturbance voltages measured. We simulated conducted disturbance voltages for evaluation by use of the linear equivalent circuit model as an evaluation of the model. As comparing simulated and measured disturbance voltages, the spectrum of the conducted disturbance voltages agreed with each other in their envelopes.

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  • RL Damper Circuit for Electoromagnetic Compatibility and Power Integrity of Integrated Circuits

    YAMAGATA Ryosuke, YANO Yusuke, IOKIBE Kengo, TOYOTA Yoshitaka

    IEICE technical report. Electromagnetic compatibility   112 ( 12 )   43 - 48   2012.4

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    Resonances of the parasitic impedance in power distribution network (PDN) increase power current in radio frequency that leaks toward the DC power supply side of PDN. In this report, a damper circuit was applied to reduce the resonant current. The damper circuit was composed as a parallel RL circuit that damped two type of PDN resonances, on-board and chip-package-board resonances. The RL damper was inserted upon power traces on board and on package. The RL damper was confirmed by circuit simulation and experimental measurement that it damps the both resonances. And that RL damper suppress resonant peaks in the RF power current and PDN input impedance, and that it can work well in EMI reduction and PI improvement. In addition, the effect of RL damper on immunity was also validated with wireless-communications modules being suffered of noise injection. Immunity of the wireless-communication modules was improved by insertion of the RL damper except when frequency of injected noise was agreed to that of PDN resonance. The RL damper is a potential way to solve EMC (emission and immunity) and PI issues.

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  • B-4-29 Identification of Equivalent Current Source of Cryptographic Circuit by Means of LECCS Modeling Method

    Okamoto Kaoru, Amano Tetsuo, Iokibe Kengo, Toyota Yoshitaka

    Proceedings of the IEICE General Conference   2012 ( 1 )   359 - 359   2012.3

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  • B-4-9 Construction of Dual-Port LISN for Linear Equivalent Circuit Modeling of Power Convert Circuit

    Inoue Shuhei, Iokibe Kengo, Toyota Yoshitaka, Watanabe Tetsushi

    Proceedings of the IEICE General Conference   2012 ( 1 )   339 - 339   2012.3

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  • B-4-10 Linear Equivalent Circuit Modeling of Power Converter Circuit for COnducted Disturbance Reduction Design

    Ishiyama Naotaka, Inoue Shuhei, Iokibe Kengo, Toyota Yoshitaka, Watanabe Tetsushi

    Proceedings of the IEICE General Conference   2012 ( 1 )   340 - 340   2012.3

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  • CS-6-6 Circuit Simulation with Modal Equivalent Circuit for Noise Suppression

    Toyota Yoshitaka, Iokibe Kengo, Koga Liuji R.

    Proceedings of the IEICE General Conference   2012 ( 1 )   "S - 25"-"S-26"   2012.3

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  • Measurement of IC Package Inductance with Transmission Line Embedded in Package

    IOKIBE Kengo, TANIMICHI Ayumi, TOYOTA Yoshitaka

    111 ( 412 )   11 - 16   2012.1

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    It is of importance for designers to possess accurate inductances of IC packages in power integrity(PI) and electromagnetic compatibility designs. The authors had proposed a simple method to measure inductance of IC package that is mounted on a practical printed circuit board. They investigated the method in terms of accuracy here. In the proposed method, a transmission line is embedded in an IC package interested, and two port S parameters of a network composed of a targeted package structure, the transmission line, and the corresponding symmetric package structure is measured. The package inductance is calculated from the measured S parameters and properties of the transmission line obtained beforehand. The proposed method was applied to four test IC packages, and their inductances were measured. The measurement was demonstrated on a commercial electromagnetic simulator, HFSS. The package inductances were also obtained by analyzing the test package directly for comparison to the results of the proposed method. They agreed with the maximum error of 0.9 nH. To understand a cause of the error, the authors investigated effects of dummy-objects that were used to place measuring ports in the HFSS calculation. The dummy-object caused errors less than 0.06 nH, which means it seldom cause significant errors.

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  • Mode-equivalent Modeling and Identification of System with Cable Interconnection between Transmitter and Receiver Pairs (Part 3)

    TOYOTA Yoshitaka, SEJIMA Kota, IOKIBE Kengo, KOGA Liuji R., WATANABE Tetsushi

    IEICE technical report. Electromagnetic compatibility   111 ( 319 )   19 - 24   2011.11

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    We focus on the expression by using modal equivalent-circuit model. The goal of this study is to clarify the mechanism of the phenomena caused by mode conversion and then find effective measures. The simple model is based on mode-decomposition technique and places mode-conversion sources at the interface where the current division factors of the transmission lines are different. In this study, a simple cable interconnection system with a node and common-mode excitation by a current probe were investigated to evaluate the validity of this study. As a result, both cases agreed well between measurement and circuit simulation with the modal-equivalent circuit model.

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  • Band elimination characteristics of EBG structure containing ferrite-plated films

    KONDO Koichi, YOSHIDA Shigeyoshi, TOYOTA Yoshitaka

    2011 ( 91 )   59 - 62   2011.11

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  • Insertion of Dumping Resistor to Reduce RF IC-Power-Current Peak Caused by Resonance due to Parasitic Impedance

    YANO Yusuke, IOKIBE Kengo, TOYOTA Yoshitaka

    2011 ( 19 )   29 - 34   2011.10

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  • 差動伝送線路を対象とした平衡度不整合モデルによるコモンモード電流予測法の検証

    松嶋徹, 渡辺哲史, 豊田啓孝, 古賀隆治, 和田修己

    マイクロエレクトロニクスシンポジウム論文集   21st   217 - 220   2011.9

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  • Measurement of Self-Inductance of IC Package with THRU Pattern Embedded Instead of Chip

    TANIMICHI Ayumi, IOKIBE Kengo, TOYOTA Yoshitaka

    IEICE technical report   111 ( 131 )   31 - 36   2011.7

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    In IC package modeling of electrical properties, to compare model parameters extracted from results of electromagnetic calculations to those obtained from measurements is an important method for validation of the model. Only direct probing methods for special package, however, had been reported in literature. There is no method for actual packages molded with resin and mounted on printed circuit board. This paper proposes an extraction method of self-inductance of actual IC packages. Four test packages consisted of interposer and bonding wires were employed for validation of the method. Self-inductances of the four packages were extracted from measured impedance parameters obtained by a two ports measurement at board level. The test package contained a THRU line instead of IC-chip. By subtracting inductance of the THRU line from inductance between the two ports of measurement, the package inductance was obtained. As a result, the self-inductance were obtained with absolute errors between -0.8 and -0.2 nH in measurement, between -0.9 〜 -0.6 nH in electromagnetic calculations.

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  • Control and design of stopband by applying two stubs to open-stub EBG structure

    NAGAO Atsushi, TOYOTA Yoshitaka, IOKIBE Kengo

    IEICE technical report   111 ( 131 )   91 - 96   2011.7

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    To suppress the parallel resonance between power/ground planes on printed circuit boards, electromagnetic bandgap (EBG) structure can be applied. The open-stub EBG structure with two stubs in a unit cell is expected to miniaturize the cell size, expand the stopband and form multi-stopbands. In addition to, compare it with mushroom-type EBG structure and open-stub EBG structure with one stub through equivalent-circuit analysis, we established the design methodology to realize both stopbands of 2.4 GHz and 5.2 GHz. As a result, different lengths with two stubs led separate stopbands of 2.4 GHz and 5.2 GHz. Furthermore, we evaluated the difference of spiral stub length between the equivalent circuit model using characteristic parameters and electromagnetic simulation that requires the physical sizes.

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  • Evaluation of Power/Ground Layers with EBG structure and Ferrite Film for Noise Suppression and Power-Integrity Improvement

    MAHMOOD Farhan Zaheed, TOYOTA Yoshitaka, IOKIBE Kengo, KONDO Koichi, YOSHIDA Shigeyoshi

    IEICE technical report   111 ( 66 )   75 - 80   2011.5

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    Power/ground layers of Printed Circuit Board (PCB) require two conditions of noise suppression and power integrity (PI). We proposed the application of Electromagnetic Bandgap (EBG) structure and ferrite film to power/ground layers. In this paper, not only a test board with the proposed structure but three other test boards to be compared were fabricated to measure with a vector network analyzer. The measured data was evaluated for EMI and PI characteristics. Additional evaluation using a commercial circuit simulator was carried out to evaluate PI characteristics for assuming a real power-supply circuit. Through the evaluation, the proposed structure provided sufficient results. Also almost same characteristics was provided by the test board with only ferrite film.

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  • Mode-equivalent Modeling and Identification of System with Cable Interconnection between Transmitter and Receiver Pairs (Part 2)

    SEJIMA Kota, TOYOTA Yoshitaka, IOKIBE Kengo, KOGA Liuji R., WATANABE Tetsushi

    IEICE technical report   111 ( 66 )   93 - 98   2011.5

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    At the interface where two transmission lines with different current division factors are connected, there occurs mode conversion. Focusing on a transmission system where a microstrip line on printed circuit board with a transmitter or a receiver is connected to a two-wire line above the system ground, the modal equivalent-circuit model with mode-conversion sources was developed. The model was validated by comparing common mode current and normal-mode voltage between measurement and circuit simulation. As a result, both spectra have a good agreement, which indicates that mode conversion is expressed using the proposed mode-conversion sources. According to the model, two approaches were carried out to reduce normal-mode voltage in common-mode resonance: reduction in the difference of current division factors and reduction in common-mode current. It was found that both approaches can suppress mode conversion as expected by the model.

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  • Decoupling of Power Distribution Network to Improve Tolerance of Side-Channel Attacks in Cryptographic FPGA

    AMANO Tetsuo, IOKIBE Kengo, TOYOTA Yoshitaka

    IEICE technical report   111 ( 18 )   19 - 24   2011.4

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    Side-channel attack is a cryptanalytic attack by means of radio frequency (RF) power current from cryptographic IC. On-board decoupling was examined experimentally in two decoupling conditions and the default no-decoupling condition to prove its usefulness as a countermeasure against the side-channel attack. The RF power current of a cryptographic FPGA (Field-Programmable Gate Array) was decoupled with a decoupling circuit. The decoupling circuit was installed in the power distribution network of the cryptographic FPGA on a Side-channel attack standard evaluation baord, SASEBO-G. The RF power current which was generated as the FPGA was operating an AES (Advanced Encryption Standard) encryption process was detected with a current probe on power cables. The current detection was repeated until 30,000 waveforms were obtained in each decoupling conditions. The waveforms were analyzed statistically by the correlation power analysis (CPA). CPA results showed that one of the decoupling circuits improved tolerance of the FPGA to the side-channel attack, while the other decoupling circuit hardly change the tolerance. Noticeable difference between the two decoupling circuits appeared in the frequency range below the frequency of the FPGA clock. The RF power current was reduced all over the lower range in the decoupling condition the tolerance improved. The RF power current reduction was proved to be a result of the decoupling by circuit simulations.

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  • B-4-39 On-Board Decoupling to Improve Tolerance of Cryptographic Board against Side-Channel Attacks

    Iokibe Kengo, Toyota Yoshitaka

    Proceedings of the IEICE General Conference   2011 ( 1 )   352 - 352   2011.2

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  • B-4-40 Control of Stopband by Applying Two Stubs to Open-stub EBG Structure

    Nagao Atsushi, Toyota Yoshitaka, Iokibe Kengo, Koga Liuji R.

    Proceedings of the IEICE General Conference   353 - 353   2011

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  • Mode-equivalent Modeling and Identification of System with Cable Interconnection between Transmitter and Receiver Pairs

    TOYOTA Yoshitaka, WATANABE Tetsushi, IOKIBE Kengo, KOGA Ryuji

    IEICE technical report   110 ( 300 )   33 - 38   2010.11

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    In the transmission system where a transmitter and receiver are connected with a cable at a certain distance above the system ground, a mode equivalent-circuit model is proposed to estimate mode current flowing along the system. The simple model is based on mode-decomposition technique and places mode-conversion voltage source and current source at the interface between the transmitter/receiver and the cable where the current division factors are different. In this study, a simple cable interconnection system without dielectric was used to estimate the common-mode current flowing along the system. The circuit simulation using the proposed model showed a good agreement with the circuit simulation regarding as coupled transmission lines. In addition, the mode-current spectrum is found to be close to that obtained from full-wave analysis. Some discrepancy was observed as the distance from the system ground gets larger.

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  • BI-2-3 Validation of Parasitic Couplings and Combination with IBIS for PI/SI Calculation in LECCS Model

    Iokibe Kengo, Toyota Yoshitaka, Koga Ryuji, Oka Norimasa

    Proceedings of the Society Conference of IEICE   2010 ( 1 )   "SS - 81"-"SS-82"   2010.8

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  • Effective Position of Decoupling Inductor Taking Parasitic Capacitances on Power Distribution Network Traces into Account

    YANO Yusuke, IOKIBE Kengo, TOYOTA Yoshitaka, KOGA Ryuji

    IEICE technical report   110 ( 125 )   39 - 44   2010.7

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    High-frequency current caused by simultaneous switching of digital gates can be increased with decoupling capacitors, because equivalent series inductance (ESL) of the decoupling capacitors makes resonance with parasitic capacitance on power distribution network trace. In this report, we discussed the location of decoupling inductors as a countermeasure and to reduce the high frequency power current by a circuit simulation. We employed a four-layered printed circuit board as a device under test. The board included an oscillation circuit with a versatile inverter IC and a power distribution network. The board was modeled with a linear equivalent circuit and a current source (LECCS) for the circuit simulations of the RF powe current and power bounce. Results of the circuit simulations showed that reduction of the RF power current was larger with a decoupling inductor placed between the decoupling capacitor and the parasitic capacitance than out side the parasitic capacitance, though a peak current could be occur due to a resonance the parasitic capacitance contributed. The RF power current was reduced at all frequencies even when the decoupling inductor was placed outside the parasitic capacitance. In addition, in order to investigate influence on power integrity (PI) performance of the IC, potential difference between power terminals of chip was calculated. The simulation results showed that the decoupling inductors caused trivial deterioration in P1 performance of the IC.

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  • Suppression of Guard-Trace Resonance by Matched Termination for Reducing Common-Mode Radiation

    Tetsushi Watanabe, Tohlu Matsushima, Yoshitaka Toyota, Osami Wada, Ryuji Koga

    IEICE TRANSACTIONS ON COMMUNICATIONS   E93B ( 7 )   1746 - 1753   2010.7

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    We propose a novel technique of matching at both ends of the guard trace to suppress resonance. This approach is derived from the viewpoint that the guard trace acts as a transmission line. We examined that matched termination suppresses guard-trace resonance through simulating a circuit and measuring radiation. We found from these results that the proposed method enables guard-trace voltages to remain low and hence avoids increases in radiation. In addition, we demonstrated that "matched termination at the far end of the guard trace" could suppress guard-trace resonance sufficiently at all frequencies. We eventually found that at least two vias at both ends of the guard trace and only one matching resistor at the far end could suppress guard-trace resonance. With respect to fewer vias, the method we propose has the advantage of reducing restrictions in the printed circuit board layout at the design stage.

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  • Calculation of Common-Mode Radiation from Single-Channel Differential Signaling System Using Imbalance Difference Model

    Tohlu Matsushima, Tetsushi Watanabe, Yoshitaka Toyota, Ryuji Koga, Osami Wada

    IEICE TRANSACTIONS ON COMMUNICATIONS   E93B ( 7 )   1739 - 1745   2010.7

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    In a differential transmission line, a large common-mode radiation is excited due to its asymmetry. In this paper, the imbalance difference model, which was proposed by the authors for estimation of common-mode radiation, is extended to apply to the differential signaling systems. The authors focus on a differential transmission line with asymmetric property, which consists of an adjacent return plane and two signal lines which are placed close to an edge of the return plane. Three orthogonal transmission modes, a normal mode, a primary common mode and a secondary common mode, are defined. Among these transmission modes, the secondary common mode is dominant in radiation, and a mechanism of the secondary common-mode generation is explained. The radiated emission which was calculated using the imbalance difference model was in good agreement with that obtained by full wave calculation.

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  • Calculation of Common-Mode Radiation from Single-Channel Differential Signaling System Using Imbalance Difference Model

    Tohlu Matsushima, Tetsushi Watanabe, Yoshitaka Toyota, Ryuji Koga, Osami Wada

    IEICE TRANSACTIONS ON COMMUNICATIONS   E93B ( 7 )   1739 - 1745   2010.7

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    In a differential transmission line, a large common-mode radiation is excited due to its asymmetry. In this paper, the imbalance difference model, which was proposed by the authors for estimation of common-mode radiation, is extended to apply to the differential signaling systems. The authors focus on a differential transmission line with asymmetric property, which consists of an adjacent return plane and two signal lines which are placed close to an edge of the return plane. Three orthogonal transmission modes, a normal mode, a primary common mode and a secondary common mode, are defined. Among these transmission modes, the secondary common mode is dominant in radiation, and a mechanism of the secondary common-mode generation is explained. The radiated emission which was calculated using the imbalance difference model was in good agreement with that obtained by full wave calculation.

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  • Suppression of Guard-Trace Resonance by Matched Termination for Reducing Common-Mode Radiation

    Tetsushi Watanabe, Tohlu Matsushima, Yoshitaka Toyota, Osami Wada, Ryuji Koga

    IEICE TRANSACTIONS ON COMMUNICATIONS   E93B ( 7 )   1746 - 1753   2010.7

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    We propose a novel technique of matching at both ends of the guard trace to suppress resonance. This approach is derived from the viewpoint that the guard trace acts as a transmission line. We examined that matched termination suppresses guard-trace resonance through simulating a circuit and measuring radiation. We found from these results that the proposed method enables guard-trace voltages to remain low and hence avoids increases in radiation. In addition, we demonstrated that "matched termination at the far end of the guard trace" could suppress guard-trace resonance sufficiently at all frequencies. We eventually found that at least two vias at both ends of the guard trace and only one matching resistor at the far end could suppress guard-trace resonance. With respect to fewer vias, the method we propose has the advantage of reducing restrictions in the printed circuit board layout at the design stage.

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  • Linear Equivalent Circuit Model of Inverter in Microwave Oven for EMI Filter Design

    IOKIBE Kengo, WATANABE Tetsushi, SAKIYAMA Kazuyuki, SAITO Yoshiyuki, TOYOTA Yoshitaka, KOGA Ryuji

    IEICE technical report   110 ( 84 )   25 - 30   2010.6

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    A Linear equivalent circuit model of inverter was proposed for applying to designing EMC filters to reduce the conducted emission from electrical appliances with switched-mode power supplys as inverters and converters. We employed a microwave oven as the equipment under test(EUT)and measured the conducted emission voltage at mains port with a line impedance stabilizing network(LISN). Measured disturbances contained both the differential and common modes and we determined the proposed model to have a circuitry structure composed of differential- and common-mode blocks. We, then, described a simple method to determine model parameters from measurements and decided the parameters with the method. With the proposed model, the conducted emission voltage of the EUT was estimated through circuitry simulation and compared to measurement. The comparison showed that the model predicted performance of the EMI filter in reduction of the conducted emission in practical accuracies at frequencies in which model parameters determined had been reasonable.

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  • 平衡度不整合によるコモンモードの発生とその低減法

    渡辺哲史, 松永茂樹, 松嶋徹, 和田修己, 豊田啓孝, 古賀隆治

    電子情報通信学会大会講演論文集   2010   SS.110-SS.111   2010.3

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  • B-4-5 Accuracy Evaluation of Combined IBIS and LECCS Macro Models by SPICE Simulations for PI and SI Performances

    OKA Norimasa, IOKIBE Kengo, TOYOTA Yoshitaka, KOGA Ryuji

    Proceedings of the IEICE General Conference   2010 ( 1 )   355 - 355   2010.3

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  • 平衡度不整合理論に基づく多チャンネル差動伝送線路のコモンモード放射予測

    松嶋 徹, 渡辺 哲史, 豊田 啓孝, 和田 修己, 古賀 隆治

    エレクトロニクス実装学会講演大会, 10B-06,, pp. 28-29   2010.3

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  • Development of a Equivalent Circuit Model with Transmission Line Model for Designing Filter Formed on Printed Circuit Boards

    MATSUMOTO Keisuke, TOYOTA Yoshitaka, IOKIBE Kengo, KOGA Ryuji

    IEICE technical report   109 ( 370 )   81 - 86   2010.1

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    Slit pattern formed on return plane of printed circuit boards behaves like a passive element. A defected ground structure (DGS) is one of them. The characteristics of DGS easily varies with the slit pattern so that it is expected for various applications. Since a design method has not been developed, however, we need to establish the method to design a slit pattern. Some equivalent circuit models have been used but they consist of lumped elements and require full-wave simulation. In addition, value of the lumped elements have no relation to a physical parameters. So it is not useful for filter designing. In this report, we proposed equivalent circuit model with transmission line model for DGS with filter function. Transmission characteristic was calculated by both full-wave simulator and circuit simulator with the proposed equivalent circuit model and the first stop-band width calculated by circuit simulator was in agreement with full-wave simulator.

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  • Prediction of EMI from two-channel differential signaling system based on imbalance difference model Reviewed

    T. Matsushima, T. Watanabe, Y. Toyota, R. Koga, O. Wada

    IEEE International Symposium on Electromagnetic Compatibility   413 - 418   2010

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    DOI: 10.1109/ISEMC.2010.5711310

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  • Stopband Characteristics of Planar-type Electromagnetic Bandgap Structure with Ferrite Film

    Yoshitaka Toyota, Koichi Kondo, Shigeyoshi Yoshida, Kengo Iokibe, Ryuji Koga

    2010 ASIA-PACIFIC INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY & TECHNICAL EXHIBITION ON EMC RF/MICROWAVE MEASUREMENTS & INSTRUMENTATION   664 - 667   2010

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    The noise suppression effect after interposing a ferrite film of several microns in thickness between the power and ground planes is discussed in this paper. In particular, we focused on the combination of a planar electromagnetic bandgap structure with a ferrite film deposited by using spin spray ferrite plating at a low temperature. In this paper, the stopband characteristics are discussed through the use of both simulation and measurement results. First, a full-wave electromagnetic simulation revealed that a test board with a dielectric as thin as a few hundreds of microns has the stopband characteristics of the frequency shift towards the lower frequencies (miniaturization effect) and stopband expansion with the removal of the passband, which was not observed in the case of a thick-dielectric test board. The simulation results also demonstrated that these improvements mainly resulted from the complex permeability of the ferrite film. Next, we found that the measurements are very similar to the simulation results.

    DOI: 10.1109/APEMC.2010.5475608

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  • Development of Equivalent Circuit Model with Transmission Line Model for Designing Filters Formed on Printed Circuit Boards

    Keisuke Matsumoto, Yoshitaka Toyota, Kengo Iokibe, Ryuji Koga

    2010 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC 2010)   289 - 294   2010

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    The slit pattern formed on the return plane of printed circuit boards (PCBs) acts like a passive element and a defected ground structure (DGS) is one of them. In this paper, we propose an equivalent circuit model with a transmission line model for use in DGS with a filter characteristics. The characteristics of DGS are easily varied with the slit pattern. Thus, DGS is expected to be used for various applications such as a common-mode filter in differential signaling systems. Since a design method has yet to be developed, however, we need to establish a design method for the slit pattern. Some equivalent circuit models have been used, but the models that consist of lumped elements require a full-wave simulation. In addition, the values of the lumped elements do not relate to the physical parameters. Therefore it is not useful for designing filters. In contrast, the equivalent circuit model we propose in this paper will have a great contribution to designing filters with optimum performances and fit for size reduction on PCBs because the transmission line model relates to the physical parameters. As a result, by comparing the transmission characteristics calculated with both a full-wave simulator and a circuit simulator with the proposed equivalent circuit model, the first stop-band width calculated by using the circuit simulator was in agreement with the full-wave simulator.

    DOI: 10.1109/ISEMC.2010.5711287

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  • PI/SI解析精度向上を目的としたIBIS及びLECCS-core組合せICマクロモデル

    岡典正, 五百旗頭健吾, 豊田啓孝, 古賀隆治

    電子情報通信学会論文誌C   J93-C ( 11 )   433 - 444   2010

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  • Development of Equivalent Circuit Model with Transmission Line Model for Designing Filters Formed on Printed Circuit Boards

    Keisuke Matsumoto, Yoshitaka Toyota, Kengo Iokibe, Ryuji Koga

    2010 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC 2010)   289 - 294   2010

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    The slit pattern formed on the return plane of printed circuit boards (PCBs) acts like a passive element and a defected ground structure (DGS) is one of them. In this paper, we propose an equivalent circuit model with a transmission line model for use in DGS with a filter characteristics. The characteristics of DGS are easily varied with the slit pattern. Thus, DGS is expected to be used for various applications such as a common-mode filter in differential signaling systems. Since a design method has yet to be developed, however, we need to establish a design method for the slit pattern. Some equivalent circuit models have been used, but the models that consist of lumped elements require a full-wave simulation. In addition, the values of the lumped elements do not relate to the physical parameters. Therefore it is not useful for designing filters. In contrast, the equivalent circuit model we propose in this paper will have a great contribution to designing filters with optimum performances and fit for size reduction on PCBs because the transmission line model relates to the physical parameters. As a result, by comparing the transmission characteristics calculated with both a full-wave simulator and a circuit simulator with the proposed equivalent circuit model, the first stop-band width calculated by using the circuit simulator was in agreement with the full-wave simulator.

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  • 多電源ピンICのLECCS-coreモデルによる電源電流予測精度の検証

    五百旗頭健吾, 東亮太, 津田剛宏, 市川浩司, 中村克己, 豊田啓孝, 古賀隆治, デンソー

    電子情報通信学会論文誌C   J93-C ( 11 )   516 - 520   2010

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  • Stopband Characteristics of Planar-type Electromagnetic Bandgap Structure with Ferrite Film

    Yoshitaka Toyota, Koichi Kondo, Shigeyoshi Yoshida, Kengo Iokibe, Ryuji Koga

    2010 ASIA-PACIFIC INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY & TECHNICAL EXHIBITION ON EMC RF/MICROWAVE MEASUREMENTS & INSTRUMENTATION   664 - 667   2010

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    The noise suppression effect after interposing a ferrite film of several microns in thickness between the power and ground planes is discussed in this paper. In particular, we focused on the combination of a planar electromagnetic bandgap structure with a ferrite film deposited by using spin spray ferrite plating at a low temperature. In this paper, the stopband characteristics are discussed through the use of both simulation and measurement results. First, a full-wave electromagnetic simulation revealed that a test board with a dielectric as thin as a few hundreds of microns has the stopband characteristics of the frequency shift towards the lower frequencies (miniaturization effect) and stopband expansion with the removal of the passband, which was not observed in the case of a thick-dielectric test board. The simulation results also demonstrated that these improvements mainly resulted from the complex permeability of the ferrite film. Next, we found that the measurements are very similar to the simulation results.

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  • Application of IC Macro Model (LECCS) to Bypass Circuit Design for Improving EMI/PI Performance

    OKA Norimasa, IOKIBE Kengo, TOYOTA Yoshitaka, KOGA Ryuji

    IEICE technical report   109 ( 241 )   141 - 146   2009.10

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    An IC macro model for power current analysis, called linear equivalent circuit and current source (LECCS) model, is applied to a bypass circuit design. In the bypass circuit design, since requirements to improve electromagnetic interference (EMI) and power integrity (PI) performances are becoming more and more important, improving methods are considered using the LECCS model. The LECCS model, consisting of a linear equivalent circuit and current sources, the former is closely related to EMI performance and the latter is connected to PI performance. Therefore, each idea for better performance is different. Actually examples of bypass circuits based on the idea are shown, and it is verified that the circuits work out by using a SPICE model.

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  • Application of IC Macro Model (LECCS) to Bypass Circuit Design for Improving EMI/PI Performance

    OKA Norimasa, IOKIBE Kengo, TOYOTA Yoshitaka, KOGA Ryuji

    IEICE technical report   109 ( 242 )   141 - 146   2009.10

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    An IC macro model for power current analysis, called linear equivalent circuit and current source (LECCS) model, is applied to a bypass circuit design. In the bypass circuit design, since requirements to improve electromagnetic interference (EMI) and power integrity (PI) performances are becoming more and more important, improving methods are considered using the LECCS model. The LECCS model, consisting of a linear equivalent circuit and current sources, the former is closely related to EMI performance and the latter is connected to PI performance. Therefore, each idea for better performance is different. Actually examples of bypass circuits based on the idea are shown, and it is verified that the circuits work out by using a SPICE model.

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  • B-4-56 An Equivalent Circuit Model for Designing of Band-Elimination Filter Formed on Return Plane of Printed Circuit Board

    Matsumoto Keisuke, Toyota Yoshitaka, Iokibe Kengo, Koga Ryuji

    Proceedings of the Society Conference of IEICE   2009 ( 1 )   339 - 339   2009.9

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  • Examination of EMC Macro Model LECCS-I/O with Two Current Sources Simulating Power and Output Currents of CMOS Inverter IC

    TASAKA Tomoya, OKA Norimasa, IOKIBE Kengo, TOYOTA Yoshitaka, KOGA Ryuji

    IEICE technical report   109 ( 185 )   1 - 6   2009.8

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    In the field of designing printed circuit boards (PCBs), EMC macro-models become increasingly useful to verify EMI performance of PCB with integrated circuits (ICs). This report discussed on estimations of RF currents due to the IC switching by using an IC EMC macro-model, LECCS-I/O, which had been developed to simulate RF power currents of ICs. We focused on not only the RF power current but also the output current of a CMOS I/O gate, since the EMI is caused by RF currents on both power distribution networks and signal lines. We constructed a LECCS-I/O model, with two current sources from measurements and verified the RF currents at power and output pins, comparing to another LECCS-I/O model with a single current source. Results showed that the both models estimate the power current with errors less than 5dB compared to measurements up to 500MHz. Considering the output current, the two-sources model also predicted accurately up to 500MHz, while the single-source model increased errors.

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  • Evaluation of EMI Reduction Effect of Guard Traces Based on Imbalance Difference Model

    Tohlu Matsushima, Tetsushi Watanabe, Yoshitaka Toyota, Ryuji Koga, Osami Wada

    IEICE TRANSACTIONS ON COMMUNICATIONS   E92B ( 6 )   2193 - 2200   2009.6

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    Placing a guard trace next to a signal line is the conventional technique for reducing the common-mode radiation from a printed circuit board. In this paper, the suppression of common-mode radiation from printed circuit boards having guard traces is estimated and evaluated using the imbalance difference model, which was proposed by the authors. To reduce common-mode radiation further, a procedure for designing a transmission line with guard traces is proposed. Guard traces connected to a return plane through vias are placed near a signal line and they decrease a current division factor (CDF). The CDF represents the degree of imbalance of a transmission line, and a common-mode electromotive force depends on the CDF Thus, by calculating the CDF, we can estimate the reduction in common-mode radiation. It is reduced not only by placing guard traces, but also by narrowing the signal line to compensate for the variation in characteristic impedance due to the guard traces. Experimental results showed that the maximum reduction in common-mode radiation was about 14 dB achieved by placing guard traces on both sides of the signal line, and the calculated reduction agreed with the measured one within 1 dB. According to the CDF and characteristic impedance calculations, common-mode radiation can be reduced by about 25 dB while keeping the characteristic impedance constant by changing the gap between the signal line and the guard trace and by narrowing the width of the signal line.

    DOI: 10.1587/transcom.E92.B.2193

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  • Increase of Common-Mode Radiation due to Guard Trace Voltage and Determination of Effective Via-Location

    Tohlu Matsushima, Tetsushi Watanabe, Yoshitaka Toyota, Ryuji Koga, Osami Wada

    IEICE TRANSACTIONS ON COMMUNICATIONS   E92B ( 6 )   1929 - 1936   2009.6

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    A guard trace placed near a signal line reduces common-mode radiation front a printed circuit board. The reduction effect is evaluated by the imbalance difference model, which was proposed by the authors, when the guard trace has exactly the same potential as the return plane. However, depending on interval of ground connection of the guard trace, the radiation can increase when the guard trace resonates. In this paper, the authors show that the increase of radiation is caused by the common mode, and extend the imbalance difference model to explain a mechanism of increase of common-mode radiation. Additionally, the effective via location of the guard trace is proposed to reduce the number of vias. The guard trace voltage due to the resonance excites the common mode at the interface where the cross-sectional structure of the transmission line changes since the common-mode excitation is expressed by the product of the voltage and the difference of current division factors. To suppress the common-mode excitation, the guard trace should be grounded at the point where the cross-sectional structure changes. As a result, the common-mode radiation decreases even when the guard trace resonates.

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  • Effect of Reducing Electromagnetic Noise between Power/Ground Planes with an EBG Pattern on Applying Noise Suppression Sheets

    YANO Seiji, TOYOTA Yoshitaka, IOKIBE Kengo, KOGA Ryuji, KONDO Koichi, YOSHIDA Shigeyoshi

    IEICE technical report   109 ( 18 )   7 - 12   2009.4

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    Applying the electromagnetic bandgap (EBG) structure to power/ground planes of printed circuit boards (PCBs) helps prevent electromagnetic waves from propagating between them at frequencies of interest. We experimentally demonstrated that interposing noise suppression sheet (NSS) into power bus of PCBs is effective for not only miniaturizing the EBG structure but also expanding the stopband towards higher frequencies. This paper clarifies the mechanism of the phenomenon that appears when applying the NSS to the power bus. To distinguish the effects due to permittivity and permeability of the NSS, the S-parameter measurement with the strong magnetic field applied was carried out. The measurement results showed the stopband shift towards lower frequencies results from the effect of the anisotoropic permittivity of the NSS on the electric field around the slit of the EBG pattern. The phenomenon was validated by the full-wave simulation by Microwave Studio. Also, an effective approach of applying the NSS to the EBG pattern was experimentally investigated.

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  • Effect of Frequency Step on Uncertainty of Measurement by Site VSWR Method

    WATANABE Tetsushi, TOYOTA Yoshitaka, IOKIBE Kengo, KOGA Ryuji

    IEICE technical report   109 ( 18 )   1 - 6   2009.4

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    EMI measurement over 1GHz must be operated in a free-space, open area test site. The validation method of free-space condition is called "Site Voltage Standing-wave Ratio" method, which is standardized by CISPR 16-1-4. The standard defines a new procedure for validation of EMC test sites by the ratio of maximum and minimum of transmitted voltages measured at the only 6 locations within a range of 400mm length. The small number of measurement points can cause larger uncertainty. Although the standard requires the measurement at a frequency interval of 50MHz or less, the measurement is usually performed at the largest frequency interval of 50MHz. In this paper, we propose a new approach to reduce the measurement uncertainty with a narrower frequency interval. The approach was validated by measurement as well as simulation. Also the approach was found to reduce the uncertainty caused by the location error in the measurement setup.

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  • CP-2-3 Development and Application of High-Speed EMI Simulators for Supporting EMC Design

    Toyota Yoshitaka, Koga Ryuji, Iokibe Kengo, Wada Osami

    Proceedings of the IEICE General Conference   2009 ( 1 )   "SS - 4"-"SS-5"   2009.3

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  • B-4-55 Application of Common-Mode Antenna Model to Actual Printed Circuit Boards : On Antenna Elements

    FUKUMASU Keisuke, WATANABE Tetsushi, TOYOTA Yoshitaka, IOKIBE Kengo, KOGA Ryuji

    Proceedings of the IEICE General Conference   2009 ( 1 )   398 - 398   2009.3

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  • B-4-60 Imbalance Control of Differential Signaling Transmission Line for Reduction of Common Mode

    Matsushima Tohlu, Watanabe Tetsushi, Toyota Yoshitaka, Koga Ryuji, Wada Osami

    Proceedings of the IEICE General Conference   2009 ( 1 )   403 - 403   2009.3

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  • トランジスタの静特性に基づくドライバ回路のEMIマクロモデル

    岡 典正, 五百旗頭, 健, 豊田 啓孝, 古賀 隆治

    電子情報通信学会論文誌B   J92-B ( 1 )   287 - 295   2009

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  • Reduction of EMI from Differential Signaling System Using Asymmetric Guard Trace

    Tohlu Matsushima, Tetsushi Watanabe, Yoshitaka Toyota, Kengo Iokibe, Ryuji Koga, Osami Wada

    Proceedings of International Conference on Electronics Packaging 2009 (ICEP2009)   718 - 723   2009

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  • Combination of IBIS and LECCS-core Models for SI Analysis under Non-Ideal Power Supply Conditions

    Norimasa Oka, Kengo Iokibe, Yoshitaka Toyota, Ryuji Koga

    Proceedings of 2009 Korea-Japan Joint Conference on AP/EMC/EMT (KJJC-AP/EMC/EMT 2009)   159 - 162   2009

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  • Reduction of Common-mode Radiation by Terminating Guard Trace with Resistors

    Tetsushi Watanabe, Tohlu Matsushima, Yoshitaka Toyota, Ryuji Koga, Osami Wada

    Proceedings of 2009 Internatinal Symposium on Electromagnetic Compatibility (EMC'09/Kyoto)   97 - 100   2009

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  • Examination of Power-Ground Resonance for IBIS Model with Non-Ideal Power Supply

    Norimasa Oka, Kengo Iokibe, Yoshitaka Toyota, Ryuji Koga

    Proceedings of 2009 Internatinal Symposium on Electromagnetic Compatibility (EMC'09/Kyoto)   583 - 586   2009

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  • Calculation of Common-Mode Radiation from Differential Signaling System Using Imbalance Difference Model

    Tohlu Matsushima, Keisuke Fukumasu, Tetsushi Watanabe, Yoshitaka Toyota, Kengo Iokibe, Ryuji Koga, Osami Wada

    Proceedings of 2009 Korea-Japan Joint Conference on AP/EMC/EMT (KJJC-AP/EMC/EMT 2009)   187 - 190   2009

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  • Band Elimination Characteristics of EBG Structure Containing High Permeability Ferrite Thin Films

    Koichi Kondo, Shigeyoshi Yoshida, Hiroshi Ono, Yoshitaka Toyota

    Proceedings of VIII International Symposium on Electromagnetic Compatibility and Electromagnetic Ecology (EMC'2009)   151 - 153   2009

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  • Combination of IBIS and LECCS-core Models for SI Analysis under Non-Ideal Power Supply Conditions

    Norimasa Oka, Kengo Iokibe, Yoshitaka Toyota, Ryuji Koga

    Proceedings of 2009 Korea-Japan Joint Conference on AP/EMC/EMT (KJJC-AP/EMC/EMT 2009)   159 - 162   2009

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  • Calculation of Common-Mode Radiation from Differential Signaling System Using Imbalance Difference Model

    Tohlu Matsushima, Keisuke Fukumasu, Tetsushi Watanabe, Yoshitaka Toyota, Kengo Iokibe, Ryuji Koga, Osami Wada

    Proceedings of 2009 Korea-Japan Joint Conference on AP/EMC/EMT (KJJC-AP/EMC/EMT 2009)   187 - 190   2009

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  • Reduction of EMI from Differential Signaling System Using Asymmetric Guard Trace

    Tohlu Matsushima, Tetsushi Watanabe, Yoshitaka Toyota, Kengo Iokibe, Ryuji Koga, Osami Wada

    Proceedings of International Conference on Electronics Packaging 2009 (ICEP2009)   718 - 723   2009

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  • Evaluation of Multiple Power-Supply Pin LECCS-core Model with Different Pattern Design Boards

    HIGASHI Ryota, IOKIBE Kengo, TSUDA Takahiro, ICHIKAWA Kouji, NAKAMURA Katsumi, TOYOTA Yoshitaka, KOGA Ryuji

    IEICE technical report   108 ( 132 )   43 - 48   2008.7

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    We have proposed an EMC macro model, LECCS, to achieve fast simulations of RF power currents in IC/LSIs. The model consists of linear equivalent circuits with internal equivalent current sources. In this report, we discussed on the LECCS-core model of a 16-bit microcontroller with multiple power pins. RF power currents were measured with a model-evaluation board that is different from model-construction boards in terms of power traces. The measured currents were compared to simulated ones with the LECCS-core model and agreed within 4dB of error. The LECCS model was confirmed when in a condition that decoupling capacitors were removed. Power currents were still well simulated at each power pins as well as at a junction point where power lines meet in such decoupling conditions. We presented that the model simulates the RF power currents in good accuracy.

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  • Estimation of Electromagnetic Emissions from PCBs with a Connector through the Common-Mode Antenna Model (Part 2) : Model Improvement by Considering Connector Inductance

    WAKADUKI Yuri, TORIGOE Makoto, WATANABE Tetsushi, TOYOTA Yoshitaka, IOKIBE Kengo, KOGA Ryuji

    IEICE technical report   108 ( 132 )   37 - 42   2008.7

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    In this paper, we apply a connector model with an inductance to the common-mode antenna model. The common-mode antenna model is able to estimate common-mode radiation from a printed circuit board (PCB) fast and with low calculation cost. The previous report described that the model estimated radiation from PCBs with interconnections, depending on pin configurations of the connector. However, the calculation did not follow the frequency shift depending on pin configuration. The shift seems to result from the effective inductance of connector pins. Therefore, we developed the model considering the inductance. It was found that the modified common-mode antenna model with the connector inductance followed the frequency shift of radiation spectrum. As a result, the radiation spectrum obtained from the modified common-mode antenna model has good agreement with the measured spectrum within an error of 2dB.

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  • B-4-37 Experimental Verification of Electromotive Force of Common-mode Defined in Imbalance Difference Mechanism

    Matsushima Tohlu, Watanabe Tetsushi, Toyota Yoshitaka, Iokibe Kengo, Koga Ryuji, Wada Osami

    Proceedings of the IEICE General Conference   2008 ( 1 )   346 - 346   2008.3

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  • EMI simulation based on cavity-mode model for power-bus radiation calculation of power/ground planes with IC/LSI

    Yoshitaka Toyota, Masahiro Nishida, Kengo Iokibe, Ryuji Koga, Osami Wada

    2008 ASIA-PACIFIC SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY AND 19TH INTERNATIONAL ZURICH SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, VOLS 1 AND 2   423 - +   2008

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    This paper describes an electromagnetic interference (EMI) simulation of radiated emissions caused by simultaneous switching noise in an irregular power/ground plane structure. For quick simulation of the radiated emissions from the power-bus edges, we used a series of analytical approaches: power-bus resonance characterization by a fast algorithm based on a cavity-mode model and a segmentation method and radiation calculation using equivalent magnetic current based on the field equivalent principle. The analytically based radiation calculation is achieved within a few minutes on a single personal computer and agrees with the actual measurements. Furthermore, this paper demonstrates an EMI simulation with and without decoupling capacitors by using a linear macro model of an integrated circuit as a noise source. We found a fair agreement between the simulation and measured results.

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  • Suppressing power bus resonance and radiation using and EBG structure

    Yoshitaka Toyota, Kengo Iokibe, Ryuji Koga, Koichi Kondo, Shigeyoshi Yoshida

    2008 ASIA-PACIFIC SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY AND 19TH INTERNATIONAL ZURICH SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, VOLS 1 AND 2   566 - +   2008

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    We investigated the effects of noise suppression by interposing magnetic materials between the power and ground planes of a printed circuit board and focused on RF transmission through and radiation from the power bus. To reduce power bus resonance and radiation, we used a commercial noise suppression sheet, which is commonly used to suppress RF noise generated from electronic devices. We also examined a thin Ni-Zn ferrite film for practical use in the future. We found that power bus resonance and radiation could be mitigated owing to the imaginary part of complex permeability of magnetic materials. The thin ferrite film with a planar electromagnetic bandgap (EBG) structure helped suppress transmission and radiation in the EBG passband.

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  • Experimental Validation of Imbalance Difference Model to Estimate Common-Mode Excitation in PCBs

    Yoshitaka Toyota, Tohlu Matsushima, Kengo Iokibe, Ryuji Koga, Tetsushi Watanabe

    2008 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, VOLS 1-3   578 - +   2008

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    We have proposed a common-mode antenna model that is designed specifically for estimating common-mode radiation from printed circuit boards (PCBs) very quickly. The model is composed of an antenna that has the same geometry as the adjacent ground plane of the PCB and an excitation source based on an imbalance difference model. The excitation source is provided by the product of Delta h and V-N, where Delta h is the difference in current division factors related to the cross-sectional structure of the transmission line, and VN is the voltage between the signal line and return plane of the transmission line. Here, we describe an experimental validation of the common-mode excitation carried out by measuring the reduction in radiation due to a guard trace placed close to a signal line with a narrow return plane. As a result, it was found that the total common-mode excitation can be given by a superposition of two excitation sources. The results also suggest that when designing the PCB, the guard trace should be grounded at the interface between different ground-plane widths to suppress noise.

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  • Modeling of Microcontroller with Multiple Power Supply Pins for Conducted EMI Simulations

    Kengo Iokibe, Ryota Higashi, Takahiro Tsuda, Kouji Ichikawa, Katsumi Nakamura, Yoshitaka Toyota, Ryuji Koga

    IEEE EDAPS: 2008 ELECTRICAL DESIGN OF ADVANCED PACKAGING AND SYSTEMS SYMPOSIUM   135 - +   2008

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    An EMC macro-model of a 16-bit microcontroller with multiple-power-supply pins has been proposed for estimating the conducted EMI from a power-supply network. The macro-model, called the linear equivalent circuit and current sources (LECCS) model, is composed of multiple circuit blocks and multiple current sources corresponding to the composition of the chip circuits in the microcontroller, i.e., a current source for a circuit block. A current source statistically expresses the total RF current occurring in the corresponding circuit block. We confirmed that the proposed model could correctly estimate the RF power-supply currents under different decoupling conditions up to 300 MHz. We also found that a linear circuit of the regulator between the I/O and core circuit blocks could express the RF coupling between the two blocks.

    DOI: 10.1109/EDAPS.2008.4736018

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  • Determination of Grounding Location for Guard Trace to Reduce Common-Mode Radiation

    Tohlu Matsushima, Tetsushi Watanabe, Kengo Iokibe, Yoshitaka Toyota, Ryuji Koga, Osami Wada

    Proceedjngs of International Conference on Electronics Packaging 2008 (ICEP 2008)   124 - 129   2008

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  • Prediction of the Common-mode Radiated Emission from the Board to Board Interconnection through Common-mode Antenna Model

    Makoto Torigoe, Akifumi Sadatoshi, Yoshitaka Toyota, Kengo Iokibe, Ruji Koga, Tetsushi Watanabe, Osami Wada

    2008 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, VOLS 1-3   498 - +   2008

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    In this paper, the common-mode antenna model, which can estimate the amount of common-mode radiation quickly and accurately, was applied to a board-to-board interconnection structure with a connector. The inductor model is introduced as the connector model for improving accuracy of the common-mode antenna model. By using the inductance, which was calculated with the commercial electromagnetic field simulator, the radiated emissions estimated by the model agreed with the measurement results within an error of 3 dB around the peak emission levels.

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  • EMC Macro-modeling of CMOS Inverter Using LECCS-I/O Model with Additional Current Source

    Kengo Iokibe, Akihiro Ohsaki, Yoshitaka Toyota, Ryuji Koga, Osami Wada

    2008 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, VOLS 1-3   554 - +   2008

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    The authors investigated an EMC macro-model of the CMOS logic inverter gate, named LECCS-I/O that consists of linear equivalent circuit and current sources. This paper modifies the macro-model by adding another current source to express the short-circuit current in the inverter. The macro-model was determined from SPICE calculations of impedance and power current by using a device model of an inverter IC. The modified model was tested with several load capacitances in SPICE simulation. The results showed that the macro-model predicts the power current with good accuracy in the range up to 3 GHz except for frequencies at which inductances of the package and of traces on printed circuit board and capacitance of the load caused resonances.

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  • Macro Model of Driver Circuits for EMI Simulation

    Norimasa Oka, Kengo Iokibe, Yoshitaka Toyota, Ryuji Koga

    Proceedjngs of International Conference on Electronics Packaging 2008 (ICEP 2008)   467 - 472   2008

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  • B-4-25 EMC macro-modeling of CMOS inverter with two equivalent current sources

    Iokibe Kengo, Osaki Akihiro, Toyota Yoshitaka, Koga Ryuji, Wada Osami

    Proceedings of the IEICE General Conference   334   334 - 334   2008

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  • B-4-30 Suppression of Power Bus Resonance and Radiation by High-Permeability Magnetic Metal Sheet Interposed between Power/Ground Planes of Printed Circuit Board

    Toyota Yoshitaka, Iokibe Kengo, Koga Ryuji, Kondo Koichi, Yoshida Shigeyoshi

    Proceedings of the IEICE General Conference   339 - 339   2008

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  • Investigation of Parasitic Capacitance to Improve EMC Macro Model LECCS around 1GHz

    TAKAHASHI A., IOKIBE K., PAOLETTI U., WADA O., TOYOTA Y., KOGA R.

    IEICE technical report   107 ( 167 )   5 - 10   2007.7

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    High frequency currents flowing in power supply networks of an IC/LSI has been estimated by an EMC macro model. The high frequency currents due to the simultaneous switching noise of IC/LSI involving large amount of CMOS transistor is modeled with a linear equivalent circuit and current sources. The linear equivalent circuit decreased its accuracy in impedance due to parasitic capacitances causing anti-resonances in the power supply networks. This paper shows with results of experimental and numerical analysis that the parasitic capacitances on the package and printed circuit board cause the anti-resonance. The power supply network impedance were obtained experimentally by use of three evaluation boards with different parasitic capacitances. The parasitic capacitances of the boards were calculated numerically by high-frequency electromagnetic analysis software Sonnet. Impedance simulations by considering the parasitic capacitance shows that an appropriate connection of parasitic capacitances to the LECCS model can expand an available frequency range of the model beyond 1 GHz.

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  • Estimation of Radiated Emissions with Common-mode Antenna Model of Printed Circuit Board : Superposition of Common-mode Excitation Sources

    FUKUMASU Keisuke, WATANABE Tetsushi, TOYOTA Yoshitaka, IOKIBE Kengo, KOGA Ryuji, WADA Osami

    IEICE technical report   107 ( 107 )   39 - 44   2007.6

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    A common-mode antenna model proposed by the authors is able to predict common-mode radiation from printed circuit boards (PCBs). The model consists of a common-mode excitation source and segmented antenna elements. This repeat discusses the superposition of common-mode sources, the superposition helps to calculate the radiated emissions due to the common-mode excitation in a PCB containing several MSLs. For the evalution, several PCBs with a MSL bent at a right angle were designed and fabricated. Through the experiments and numerical simulation with FDTD method, it was found that the superposition of excitation sources is available to build the common-mode antenna model.

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  • Estimation of Electromagnetic-emission from PCBs with a Connector through the Common-mode Antenna Model

    SADATOSHI Akifumi, SAKAI Youhei, WATANABE Tetsushi, TOYOTA Yoshitaka, IOKIBE Kengo, KOGA Ryuji, WADA Osami

    IEICE technical report   107 ( 25 )   49 - 54   2007.4

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    The amount of radiated emission from the connector between the motherboard and the daughterboard depends on the number of ground pins. This paper discusses the prediction of the amount of radiated emission from printed circuit boards with a connector using the common-mode antenna model proposed by the authors. the effect of reflection of an unmatched interface such as the connector-board was taken into account by using the measurement result of normal mode voltage in simulation. Common-mode emission is reduced by decreasing imbalance between the conn ector and the board.

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  • B-4-42 Miniaturization and Stopband Expansion of EBG Structure Formed in Power/Ground Plane Pair of PCBs Using High Permeability Materials

    Toyota Yoshitaka, Iokibe Kengo, Koga Ryuji

    Proceedings of the IEICE General Conference   2007 ( 1 )   366 - 366   2007.3

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  • Common-mode current related to cable ground in shape

    MORIMITSU Kazuya, WATANABE Tetsushi, TOYOTA Yoshitaka, KOGA Ryuji, WADA Osami

    IEICE technical report   106 ( 579 )   71 - 75   2007.3

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    Common-mode current was measured for a four-conductor system that is electrically floating above the reference ground. A parallel cable is used to connect a imtative common-mode transmitter and a receiver. Common-mode current was measured for different height of the devices above the ground as well as the length of the cable. The transmitter was driven with an optical fiber in order to isolate the devices from the ambient electromagnetic field. Experimental results showed that the current was almost constant for the height over 10cm, and for the lower it was increased with decreasing the height from the reference ground due to the effect of the ground. The effect of the number of ground cables was examined and it was confirmed that the common-mode current along the cable decreases with the number of ground cables in the parallel cable. The trend is explained by the relationship of common-mode current with the difference of the current divison factor between devices and the cables.

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  • Common-mode current related to cable ground in shape

    ITE technical report   31 ( 17 )   71 - 75   2007.3

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  • プリント回路基板の電源/グランドプレーンに形成する不要電磁波伝搬抑制のためのプレーナEBG構造の小型化

    豊田 啓孝, エンゲン アリフ エゲ, スワミナッサン マダハバン, 五百旗頭, 健, 古賀 隆治

    電子情報通信学会論文誌 B   J90-B ( 11 )   1135 - 1142   2007

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  • Prediction of electromagnetic emissions from PCBs with interconnections through common-mode antenna model

    Yoshitaka Toyota, Akifumi Sadatoshi, Tetsushi Watanabe, Kengo Iokibe, Ryuji Koga, Osami Wada

    EMC ZURICH-MUNICH 2007, SYMPOSIUM DIGEST   107 - +   2007

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    A motherboard-daughterboard structure with a connector is known to have another source of common-mode radiated emissions, and the emissions depend on the connector's signal/ground pin configuration. In order to estimate the amount of radiated emissions from the structure, a common-mode antenna model is described. The model consists of an excitation source and an antenna element, and it calculates radiated emissions from PCBs not only quickly but accurately for practical use. In modeling the board interconnection via a connector, we added two common-mode excitation sources at each end of the connector. The electromagnetic emissions estimated by the model agreed with the measurements within an error of 6 dB around peak emission levels between 300 and 600 MHz.

    DOI: 10.1109/EMCZUR.2007.4388207

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  • Prediction of common-mode radiation from printed circuit boards with interconnections

    Yoshitaka Toyota, Akifumi Sadatoshi, Tetsushi Watanabe, Kengo Iokibe, Ryuji Koga, Osami Wada

    2007 4TH INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY PROCEEDING: EMC 2007   142 - +   2007

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    In order to estimate. the amount of common-mode radiation from a printed circuit board with low calculation cost, a common-mode antenna model has been developed. This paper demonstrates the application of the model to a board interconnection via a connector that is known to be a possible source of common-mode radiation. The radiated emissions estimated by the model agreed with the measurements for practical use.

    DOI: 10.1109/ELMAGC.2007.4413451

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  • Miniaturization of electromagnetic bandgap (EBG) structures with high-permeability magnetic metal sheet

    Yoshitaka Toyota, Kengo Iokibe, Ryuji Koga, Arif Ege Engin, Tae Hong Kim, Madhavan Swaminathan

    2007 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY: WORKSHOP AND TUTORIAL NOTES, VOLS 1-3   55 - +   2007

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    Electromagnetic bandgap (EBG) structures in a pair of parallel planes are quite effective for suppressing simultaneous switching noise, but they are too large to be applied to compact electronic devices. To miniaturize the EBG structures, we investigated an approach to interpose a high-permeability magnetic metal sheet between the parallel planes. The experimental results show that high permeability of the sheet shifts the stopband towards lower frequencies. This suggests that such sheets contribute to the miniaturization of the EBG structures. In addition, it is demonstrated that the imaginary part of the permeability can expand the stopband.

    DOI: 10.1109/ISEMC.2007.19

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  • Fast and accurate estimation of radiated emission from printed circuit board using common-mode antenna model based on common-mode potential distribution

    Yoshitaka Toyota, Youhei Sakai, Makoto Torigoe, Ryuji Koga, Tetsushi Watanabe, Osami Wada

    2007 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY: WORKSHOP AND TUTORIAL NOTES, VOLS 1-3   702 - +   2007

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    The authors investigated common-mode potential distribution on printed circuit boards and propose a common-mode antenna model that consists of a common-mode excitation source and a common-mode antenna element. The antenna model is able to predict common-mode radiation from PCBs quickly and accurately because it focuses only on common-mode radiated emissions. This paper applies the model to a rectangular printed circuit board with a signal trace bent at a right angle and discusses the superposition of common-mode excitation sources that result from common-mode potential distribution. In the model, the trace is divided into two straight elements at the corner to obtain the common-mode excitation source separately for each straight element. Superposing each source at each position enables a set of common-mode sources of the entire common-mode antenna model to be obtained. Simulations and measurements showed that the superposition of common-mode sources accurately predicts radiated emissions.

    DOI: 10.1109/ISEMC.2007.138

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  • コモンモード電位分布に基づくプリント回路基板の等価アンテナモデル

    酒井 陽平, 渡辺 哲史, 豊田 啓孝, 古賀 隆治, 和田

    電子情報通信学会論文誌 B   J90-B ( 11 )   1116 - 1123   2007

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  • Determination of Effective Parasitic Capacitance around IC Package for EMC modeling

    Kengo Iokibe, Atsuhiro Takahashi, Umberto Paoletti, Osami Wada, Yoshitaka Toyota, Ryuji Koga

    Proceedings of 6th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo 2007)   31 - 34   2007

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  • Fast calculation of radiated emissions from arbitrarily shaped PCB with IC/LSI

    Masahiro Nishida, Yoshitaka Toyota, Kengo Iokibe, Ryuji Koga, Osami Wada

    2007 4TH INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY PROCEEDING: EMC 2007   255 - +   2007

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    This paper describes fast calculation of radiated emissions from an arbitrarily shaped printed circuit board (PCB). The radiated emissions from the PCB edge are calculated by taking into account magnetic surface current based on the field equivalent principle. The electric field at the PCB edge is provided by a fast algorithm the authors have proposed for power-bus resonance in the PCB. The calculation of radiated emission was completed within a few minutes and in, good agreement with Finite Difference Time Domain (FDTD) calculation. In addition, an EMI simulation was demonstrated by using a linear macro model of IC/LSI. The calculation results were found to be in good agreement with the measurements.

    DOI: 10.1109/ELMAGC.2007.4413479

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  • Stopband analysis using dispersion diagram for two-dimensional electromagnetic bandgap structures in printed circuit boards

    Yoshitaka Toyota, Arif Ege Engin, Tae Hong Kim, Madhavan Swaminathan

    IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS   16 ( 12 )   645 - 647   2006.12

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    Electromagnetic bandgap (EBG) structures that provide an excellent isolation within the stopband are extremely effective in suppressing propagation of simultaneous switching noise on parallel power planes. However, a scattering parameter measurement and full-wave electromagnetic simulation for their entire structure are costly and time consuming. This letter presents a two-dimensional dispersion-diagram analysis based on a unit-cell network of EBG structures by extending a well-known dispersion-diagram analysis of one-dimensional infinite periodic structures. The approach is extremely effective in computing stopband frequencies and provides the stopbands with good agreement to the measured results.

    DOI: 10.1109/LMWC.2006.885587

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  • Determination of impedances in LECCS-I/O model by 3-port VNA measurement for higher frequency range

    OSAKI Akihiro, IOKIBE Kengo, TOYOTA Yoshitaka, KOGA Ryuji, WADA Osami

    IEICE technical report   106 ( 182 )   17 - 22   2006.7

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    This report discusses impedance determination of a linear equivalent circuit (LEC) in an EMC macro model, LECCS I/O. The 2-port LECCS I/O model the authors had proposed based on 2-port measurement by a vector network analyzer (VNA) was found to be affected by an external circuit connected to the input terminals of CMOS gates. To remove the defect, this report investigated a 3-port LECCS I/O model with 3-port VNA. The 3-port model includes the input circuit of CMOS gates and the three ports of the model mean the power-supply terminal, the output terminal, and the input terminal to the ground terminal. The proposed 3-port model with 3-port VNA was used for power-ground impedance simulation by changing the impedances of external input and output circuits. As a result, the impedance simulation was in good agreement with measurements in higher frequency range compared with the previous 2-port model with 2-port VNA.

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  • EMI antenna model based on common-mode potential distribution for fast prediction of radiated emission Reviewed

    Y. Sakai, T. Watanabe, O. Wada, T. Matsushima, K. Iokibe, Y. Toyota, R. Koga

    IEEE International Symposium on Electromagnetic Compatibility   2   280 - 284   2006

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  • マイクロコントローラの多電源ピンLECCS-coreモデルの構築

    中村克己, 南澤裕一郎, 豊田啓孝, 古賀隆治, 和田修己, 斎藤義行, 中村篤

    電子情報通信学会論文誌 C   2006

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  • Virtual Port Parameters in Segmentation Method for Modeling Power Bus Structures in Multilayer PCBs

    Zhi Liang Wang, Osami Wada, Yoshitaka Toyota, Ryuji Koga

    International Journal of Microwave and Optical Technology   2006

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  • バイスタティックライダによる水雲粒子径測定原理の検証

    小林隆, 五百旗頭健吾, 杉本伸夫, 豊田啓孝, 古賀隆治

    電気・情報関連学会中国支部連合大会講演論文集(CD-ROM)   57th   2006

  • Modeling and simulation of via-connected power bus stacks in multilayer PCBs

    ZL Wang, O Wada, T Harada, T Yaguchi, Y Toyota, R Koga

    IEICE TRANSACTIONS ON COMMUNICATIONS   E88B ( 8 )   3176 - 3181   2005.8

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    Power bus noise problem has become a major concern for both EMC engineers and board designers. A fast algorithm, based on the cavity-mode model, was employed for analyzing resonance characteristics of multilayer power bus stacks interconnected by vias. The via is modeled as an inductance and its value is given by a simple expression. Good agreement between the simulated results and measurements demonstrates the effectiveness of the cavity-mode model, together with the via model.

    DOI: 10.1093/ietcom/e88-b.8.3176

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  • Examination for imbalance matching at receiver end of high differential transmission system

    MORIMITSU Kazuya, SHIGENARI Hiroshi, TOYOTA Yoshitaka, KOGA Ryuji, WADA Osami

    IEICE technical report. EMD   105 ( 216 )   7 - 12   2005.7

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    In differential signaling, the circuit configuration must be symmetric. If its configuration is asymmetric, common-mode current, which is one of the sources of EMI, is generated in transmission system. The common-mode current radiates more intensely than normal-mode (differential-mode). As a result, it makes high-speed IC/LSIs on board occurred errors. This report showes reduction of the common-mode current by imbalance matching in differential signaling system at a receiver end including a system ground plane. If the system has ground plane adjacent to the signal traces, radiated emission is smaller, because the common-mode current returns on the ground plane. Unless the ground is ideal, another common-mode current is generated. In order to distinguish the former from the latter, common-mode current flowing on a ground as the return line is called as "Primary Common-mode Current", and the new common-mode current is called as "Secondary Common mode Current".

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  • Construction of LECCS-core Model for Multiple Power-supply Pin LSI by S-parameter Measurement

    MINAMISAWA Yuichiro, OHTA Arinobu, TOYOTA Tomohiro, NAKAMURA Katsumi, WADA Osami, TOYOTA Yoshitaka, KOGA Ryuji, SAITO Yoshiyuki, NAKAMURA Atsushi

    ITE technical report   29 ( 20 )   85 - 90   2005.3

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  • Construction of LECCS-core Model for Multiple Power-supply Pin LSI by S-parameter Measurement

    MINAMISAWA Yuichiro, OHTA Arinobu, TOYOTA Tomohiro, NAKAMURA Katsumi, WADA Osami, TOYOTA Yoshitaka, KOGA Ryuji, SAITO Yoshiyuki, NAKAMURA Atsushi

    IEICE technical report. Electromagnetic compatibility   104 ( 705 )   85 - 90   2005.3

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    The authors proposed a multiple-port LECCS-core model as a macro model for EMC simulation of a multiple power-supply pin LSI. In this report, model extraction of the LECCS-core was examined by utilizing S-parameter measurement. Multiple-port LECCS-core model of a micro controller H8/3694F, which uses three power-supply terminals, was actually extracted by S-parameter measurement, and its procedure was described. Next, the internal current sources are derived from the measured power currents and the internal impedance, and the effect of a decoupling capacitance was simulated and compared with the measurement for the verification of the model. As a result, it was shown that the simulation of the core current was performed in good accuracy up to 300 MHz.

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  • Impedance Parameter Extraction of LECCS-I/O Model by S-parameter Measurement

    KONDO Yohei, SUGANO Ayako, TANAKA Daisuke, WADA Osami, TOYOTA Yoshitaka, KOGA Ryuji

    IEICE technical report. Electromagnetic compatibility   104 ( 705 )   79 - 84   2005.3

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    The authors proposed an EMC macro-model, LECCS-I/O, for driver circuits of digital ICs. In this report, a method of parameter extraction of the LECCS-I/O model is discussed, utilizing the S-parameter measurement. First, the S-parameters of the simplest T-shape LECCS-I/O model are converted to the Z-matrix and an equivalent circuit for each branch is derived. The simulation results with the model show the effectiveness of the proposed technique. Next, the extended equivalent circuit model is discussed considering impedance of the die part to improve accuracy of the model. As a result, off-state MOSFET capacitance of the output driver and the other capacitance are separately evaluated by giving impedance of the package part.

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  • Convergence acceleration and accuracy improvement in power bus impedance calculation with a fast algorithm using cavity modes

    ZL Wang, O Wada, Y Toyota, R Koga

    IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY   47 ( 1 )   2 - 9   2005.2

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    Based on the cavity-mode model, we have developed a fast algorithm-for calculating power bus impedance in multilayer printed circuit boards. The fast algorithm is based on a closed-form expression for the impedance Z matrix of a rectangular power bus structure; this expression was obtained by reducing the original double infinite series into a single infinite series under an approximation. The convergence of the single series is further accelerated analytically. The accelerated single summation enables much faster computation, since use of only a few terms is enough to obtain good accuracy.-In addition, we propose two ways to compensate for the error due to the approximation involved in the process of reducing the double series to the single series, and have demonstrated that these two techniques are almost equivalent.

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  • An inverted rib waveguide with both close coupling and strong confinement for optoelectronic integration and optical interconnection : Numerical results

    OUAABA Khalid, TOYOTA Yoshitaka, WADA Osami, KOGA Ryuji

    Technical report of IEICE. OPE   104 ( 606 )   7 - 12   2005.1

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    This paper presents a study of a polyimide inverted rib waveguide for single mode communication. With slab thickness fixed, inverted rib waveguide enables the controlling of confined optical field by means of only changing its transversal dimension (rib width). It gives high coupling efficiency as an SSC (SpotSize Converter) with optical fiber and also gives high light confinement for low radiation. Numerical results reveal that coupling loss less than 1dB, mode transition loss less than 0.1dB in the taper area can be achieved with a 4μm spot-sized fiber and strong confinement resulting in radiation loss as low as 0.007dB&acd;0.45dB. Also, misalignment coupling tolerance of 1.5μm is confirmed, which comes to easy alignment in optoelectronic systems implementation.

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  • Characteristic Analysis of Tunable Dispersion Compensator with Double Ring Resonator

    MOTOMURA Tetsuyuki, TOYOTA Yoshitaka, WADA Osami, KOGA Ryuji

    Technical report of IEICE. OPE   104 ( 606 )   13 - 16   2005.1

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    All pass filter (APF) with a ring resonator is a prospective optical dispersion compensator since it is small and easily integratable. Double ring type APF consists of two ring resonators with one coupler coupling with two rings, and has single-peak or double-peak group delay characteristics depending on power coupling ratios. It is shown that cascaded double ring type APFs have positive and negative dispersion slopes simultaneously, with the same resonance frequency for every double ring type APF, varying only power coupling ratio.

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  • A Scheme to Classify Clouds with the Depolarization Ratio andBackscattering Coeffcient Measured by Lidar

    Iokibe Kengo, Toyota Yoshitaka, Wada Osami, Koga Ryuji

    Memoirs of the Faculty of Engineering, Okayama University   39 ( 1 )   93 - 101   2005.1

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  • Standing Wave Ratio Measurement by Scanning Near-field Optical Microscope on the Optical Fiber Interconnection

    NOBUYOSHI Terumi, KOGA Ryuji, TOYOTA Yoshitaka

    Technical report of IEICE. OPE   104 ( 412 )   23 - 26   2004.11

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    A new method of measuring the standing wave ratio in an optical fiber stick chip is proposed. This method consists of sampling the standing evanescent wave over the 45° end surface of an optical fiber, where propagating mode is totally reflected. A scanning near-field optical micro-scope is used to measure optical interference pattern and near field pattern. The emphasis is that this measuring system is in situ possible to monitor transmission characteristics in the optical devices.

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  • A bidirectional iteration algorithm for determining lidar ratios and its use to evaluate boundary values in the lidar inversion

    K Iokibe, Y Itoh, Y Toyota, O Wada, R Koga

    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS   43 ( 9A )   6513 - 6519   2004.9

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    A new algorithm to estimate lidar ratios of aerosol layers with a monochromatic Mic-scattering lidar profile is proposed. The algorithm employs both the forward,and the backward solutions of the monochromatic single-scattering lidar equation. The lidar ratios are estimated through an iterative procedure to match the two solutions by correcting a lidar ratio assigned at the beginning of the procedure. The algorithm has been applied to simulated lidar profiles and a measured one from the literature. In testing of the simulated profiles, the estimation errors of the lidar ratios were investigated for four boundary conditions-clear to turbid conditions-by scanning boundary values and extinction coefficients of an aerosol layer. This investigation indicated that the algorithm estimates the lidar ratio with sufficient accuracy under clear boundary conditions even with inaccurate boundary values, but requires correct boundary values under turbid boundary conditions. The algorithm was successfully applied to the measured lidar profile of a thin aerosol layer. The obtained lidar ratio was reasonably plausible. This suggests that an enhanced form of this algorithm using the forward and the backward solutions would be able to determine the lidar ratios and boundary values from only a lidar profile measured under arbitrary atmospheric conditions.

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  • Prediction of EMI Reduction with Guard Traces on PCBs Based on Imbalance Difference Mechanism

    MATSUSHIMA Tohlu, WATANABE Tetsushi, WADA Osami, TOYOTA Yoshitaka, KOGA Ryuji

    IEICE technical report. Electromagnetic compatibility   104 ( 231 )   53 - 58   2004.7

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    The method, the authors proposed, can predict generation of common-mode current on a microstrip transmission line on PCBs of which ground width is changed, and it is explained by the imbalance difference mechanism. In this report, suppression of common-mode emission from test PCBs having guard traces is evaluated using this mechanism. The guard traces, which are connected to a ground plane through vias, are placed near a signal line. As a result, the maximum reduction of EMI is 13 dB, and the calculated reduction corresponds to the measured one within 1 dB. While resonance is observed on a guard trace at frequencies at which interval of vias is integral multiple of the half-wavelength. It can be controlled by changing the interval.

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  • EMI Reduction Effect Controlled by Arrangement of Decoupling Capacitors on Multilayer PCB with Power Island Structure

    KISHIMOTO Masanori, WATANABE Tetsushi, MURAO Takashi, WADA Osami, TOYOTA Yoshitaka, KOGA Ryuji

    IEICE technical report. Electromagnetic compatibility   103 ( 440 )   39 - 44   2004.1

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    Power bus resonance in a multilayer printed circuit board(PCB) is one of the major source of radiated EMI. Power island structures that are completely cut from other parts of the power bus by gaps are well known to be used for isolating the power bus noise and mitigating the radiated EMI. To ensure retain paths of signal lines, however, it is necessary to connect partially the island to other parts of the power bus. Isolation effect of such imperfect island structure is, of course, worse than that of a complete island structure. This report shows that the isolation effect of an imperfect island structure can be improved by setting decoupling capacitors to specific locations of the island. The effects of the number and the separation of the decoupling capacitors were studied by simulations. The validity of the simulation results was demonstrated by good agreements to measurements.

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  • Expansion of EMC Macro-model (LECCS-I/O) to Digital ICs with Multi-bit Drivers

    TANAKA Daisuke, KONDO Youhei, OSAKA Hideki, WADA Osami, TOYOTA Yoshitaka, KOGA Ryuji

    IEICE technical report. Electromagnetic compatibility   103 ( 440 )   45 - 50   2004.1

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    Extension of the EMC macro-model (LECCS) of a digital 1C that the authors have proposed is discussed. Up to now the authors have expanded the power-current model of CMOS-IC/LSI to one with I/O circuit (LECCS-I/O) having load dependence. LECCS-I/0 model was expanded to 1C operation with mixture of High and Low outputs, which is general bus operation, and validity of the expanded model was verified by measurements. In addition, by taking impedance parameter of the chip part into consideration, simulation accuracy was improved

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  • Linear Equivalent Circuit and Current Source for I/O (LECCS-I/O) Modeling of IC Power Current for EMI Simulation

    Hideki Osaka, Daisuke Tanaka, Osami Wada, Yoshitaka Toyota, Ryuji Koga

    Journal of Japan Institute of Electronics Packaging   7 ( 6 )   517 - 524   2004

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    In this paper, we describe how we modeled EMI noise from the power-pin current of an LSI that has two ports: a power-ground port and a driver output port. We called this the “Linear Equivalent Circuit and Current Source for I/O (LECCS-I/O)” model, and have evaluated it using the measured power current and power-ground impedance of a small-scale IC (74LVC04) under various combinations of loading capacitances and decoupling inductances. Results showed that up to 500 MHz, the LECCS-I/O model was able to predict peak and valley frequencies of the power current spectra within an error of 2. 5 MHz, and where the peak current error was less than 5dB. The application range of the LECCS-I/O model was valid where the shortest data duration was longer than twice the decay time constant of the power current under-damping waveform. © 2004, The Japan Institute of Electronics Packaging. All rights reserved.

    DOI: 10.5104/jiep.7.517

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  • Efficient Calculation of Power Bus Impedance using a Fast Algorithm Together with a Segmentation Method

    Zhi Liang Wang, Osami Wada, Yoshitaka Toyota, Ryuji Koga

    IEEJ Transactions on Fundamentals and Materials   124 ( 12 )   1185 - 1192   2004

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    Power bus noise prediction in multilayer printed circuit boards requires an accurate estimation of the power bus impedance. We have previously developed a fast algorithm for efficiently and accurately calculating the impedance of a rectangular power bus structure, based on a cavity mode model. In this paper, we show that the fast algorithm can also be easily utilized for a right-angled triangular power bus structure. Together with a segmentation method, the fast algorithm can then be extended to calculate the impedances of more complicated power bus structures whose patterns consist of several segments of rectangles and/or right-angled triangles. Fast computation of the S-parameters and good agreement between the calculated results and measurements for various boards demonstrated the efficiency and accuracy of using the fast algorithm together with the segmentation method as a powerful technique to estimate the power bus impedance. © 2004, The Institute of Electrical Engineers of Japan. All rights reserved.

    DOI: 10.1541/ieejfms.124.1185

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  • 二重リング共振器による共振波長間隔の拡大と光合分波

    豊田啓孝, 和田修己, 古賀隆治

    応用物理   第73巻, 第11号, pp.1428-1432   2004

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  • Expansion of EMC Macro-model (LECCS) to Multiple Power-supply Pin LSI

    TOYOTA Tomohiro, MINAMISAWA Yuichiro, NAKAMURA Katsumi, WADA Osami, TOYOTA Yoshitaka, KOGA Ryuji

    IEICE technical report. Electromagnetic compatibility   103 ( 488 )   41 - 46   2003.11

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    High frequency current flowing from power terminal of an IC/LSI onto power/ground planes of a printed circuit board is one of the major sources resulting to the radiated EMI. To achieve accurate simulation of this power current, a model representing the IC/LSI as a linear equivalent circuit together with an internal current source (LECCS model) was proposed in our previous studies. In this report, an extension of the LECCS model to a LSI with multiple power/ground pins is presented. 7 LECCS models were at first derived for 7 power/ground pairs, and were then reduced to 3 LECCS models to represent for the core, I/O, and analog circuits. Impedance simulations were carried but, based on the 7 and 3 LECCS models, respectively, and the results were compared.

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  • Application of Segmentation Method to Resonance Analysis of Power/Ground Planes with Rectangle and Triangle Elements in Multilayer PCBs

    AKAZAWA Teppei, WANG Zhi Liang, TOYOTA Yoshitaka, WADA Osami, KOGA Ryuji

    IEICE technical report. Electromagnetic compatibility   103 ( 223 )   43 - 48   2003.7

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    One of the major source of radiated EMI is attributed to power/ground plane resonance in a printed circuit board (PCB). A fast algorithm for calculating the resonance characteristics of power/ground planes in multilayer PCBs, developed by the authors, is extented to the case that the pattern of the power/ground planes consists of several segments of rectangles and right-angled triangles, using the segmentation method. Good agreements between the calculated and measured results demonstrate the usefulness and accuracy of the fast algorithm and the segmentation method.

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  • Prediction of Common Mode Radiation from a PCB with Narrow Ground Plane and Extension Wires Using Imbalance Difference Model

    MATSUNAGA Shigeki, KISHIMOTO Masanori, WATANABE Tetsushi, TOYOTA Yoshitaka, WADA Osami, KOGA Ryuji

    IEICE technical report. Electromagnetic compatibility   103 ( 223 )   61 - 68   2003.7

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    The authors proposed a model to evaluate common-mode excitation on a printed circuit board with signal lines with narrow ground plane. The model is called the "imbalance difference model". In this report, the model is applied to a set of test boards each of which has two symmetric microstrip lines that are excited with a hybrid balun, and the effect of thickness of dielectric is investigated and compared with measured results. Calculation based on the conventional "ground inductance model" is also performed, and results are compared. The estimated values with both methods and measurement results are in good agreement within 3 dB.

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  • A Simulation Method for EM Radiation from Power/Ground Plane of PCB by Using a Power Current Model, Vol.J86-B,No.2, pp.226-235

    TAKAYAMA Keisuke, KINOSHITA Tomohiro, MATSUISHI Takuya, MATSUNAGA Shigeki, WANG Zhi Liang, TOYOTA Yoshitaka, WADA Osami, KOGA Ryuji, FUKUMOTO Yukihiro, SHIBATA Osamu

    IEICE transactions on communications   86 ( 2 )   887 - 887   2003.2

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    High-frequency currents flowing from power terminals of an IC/LSI onto power/ground planes of a digital printed circuit board can generate a great amount of electromagnetic noise. A powercurrent model of an IC/LSI for EMI simulation was proposed in our previous studies. A high-speed simulation algorithm of EM radiation due to resonance of the power/ground planes in a PCB was also developed. This paper describes the mechanism and quantitative effect of reducing high frequency currents on power/ground terminals by embedding a decoupling inductor and/or a bypass capacitor in an IC/LSI package. Furthermore, the internal decoupling effect on suppressing EMI radiated from the board is verified in both the simulations and measurements.

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  • Multipath structure for FSR expansion in waveguide-based optical ring resonator

    IS Hidayat, Y Toyota, O Torigoe, O Wada, R Koga

    ELECTRONICS LETTERS   39 ( 4 )   366 - 367   2003.2

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    A multipath structure of a ring resonator is proposed to expand the free spectral range. Simulation work indicates that the multipath ring resonator has 25 GHz-adjacent-channel crosstalk of -41 dB, maximum interchannel crosstalk of - 18 dB, and -1 dB bandwidth of 4 GHz for a typical expansion factor of 10. The results show the advantages of characteristics compared with a double-cavity ring resonator and a triple-coupler ring resonator.

    DOI: 10.1049/el:20030276

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  • LSIの電源端子電流モデルのEMIシミュレーションへの適用

    高山惠介, 木下智博, 松石拓也, 松永茂樹, 王志良, 豊田啓孝, 和田修己, 古賀隆治, 福本幸弘, 柴田修

    電子情報通信学会論文誌B   2003

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  • Aerosol Extinction Coefficient Continuously Measured with Polarized Mie Scattering Lidar

    Kengo Iokibe, Yoshitaka Toyota, Osami Wada, Ryuji Koga

    Memoirs of the Faculty of Engineering, Okayama University   Vol.37, No.2, pp.89-97   2003

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  • 黄砂の観測を目的としたインターネットシステム上のレーザレーダ運用

    古賀隆治, 五百旗頭健吾, 伊藤嘉則, 白川紘之, 豊田啓孝, 和田修己

    計測自動制御学会中国支部学術講演会論文集   12th   2003

  • Effect of a rectangular field-stop for the laser rader receiving telescope

    GOTOH Takanori, IOKIBE Kengo, TOYOTA Yoshitaka, WADA Osami, KOGA Ryuji

    Technical report of IEICE. OPE   102 ( 448 )   73 - 78   2002.11

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    A rectangular field-stop was employed in a polarization-discriminating lidar to suppress multiple scattering lights in the lidar return as well as to suppress background sunlight. In this paper, effect of the rectangular field stop for background light was investigated in terms of the signal to noise ratio. The effect for multiple scattering on the polarization coefficient as the result of measurement was also investigated for a rectangular field stop in comparison with circular one.

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  • Time response analysis of optical functional devices with multiple paths

    ICHI-UMA Satoru, TOYOTA Yoshitaka, SYARIF HIDAYAT Iip, WADA Osami, KOGA Ryuji

    Technical report of IEICE. OPE   102 ( 448 )   67 - 72   2002.11

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    Various optical functional devices with multiple paths are studied. We have also studied the chracteristics of a double ring optical resonator as an optical functional device with multiple paths. In the double ring resonator, the difference of the propagation time exists between an inner ring and an outer ring. Therefore, we propose the analysis method in consideration of propagation delay time. This method was applied to our double ring resonator. It turns out that it is valid. In addition, the modulation analysis for double ring modulator was also performed with this method.

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  • Output-Load Dependency of Power Current Model of CMOS Driver Circuit

    KINOSHITA Tomohiro, OSAKA Hideki, WADA Osami, TOYOTA Yoshitaka, KOGA Ryuji

    IEICE technical report. Electromagnetic compatibility   102 ( 25 )   25 - 30   2002.4

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    A macro-model of CMOS-LC/LSI for EMI simulation is discussed. To expand the power-current model, which the authors proposed, for I/O circuit, dependencies of internal impedance and RF power-current on load capacitance are experimentally investigated. As a result, variation of rise and fall current spectra coincides with the dependency of high and low state impedances, respectively. In addition, it is shown that the variation of current spectra has no direct correlation to the impedance difference due to the change of duty ratio of input signal.

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  • Pulse Timing Control of Multiple Signal Interconnections for Reduction of EMI

    Akihiro NAMBA, Yoshitaka TOYOTA, Osami WADA, Ryuji KOGA

    MEMOIRS OF THE FACULTY OF ENGINEERING, OKAYAMA UNIVERSITY   2002

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  • Experimental Verification of Common-Mode Excitation Model for PCB Having Partially Narrow Return Path

    Tetsushi Watanabe, Osami Wada, Ryuji Koga, Yoshitaka Toyota, Takuya Miyashita

    MEMOIRS OF THE FACULTY OF ENGINEERING, OKAYAMA UNIVERSITY   2002

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  • Application of segmentation method to analysis of power/ground plane resonance in multilayer PCBs

    ZL Wang, O Wada, Y Toyota, R Koga

    2002 3RD INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY   775 - 778   2002

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    The fast algorithm developed for calculating the resonant characteristics of the power/ground planes in multilayer PCBs, is extented to the case of that the pattern of the power/ground planes consists of several "segments" of rectangles, using the so-called sec,mentation method. Good agreements between the calculated and measured results have demonstrated the usefulness and accuracy of our fast algorithm and the segmantation method.

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  • Application of Transfer Matrix Method with Signal Flow-Chart to Analyze OpticalMulti-Path Ring-Resonator

    Iip Syarif Hidayat, Yoshitaka Toyota, Osamu Torigoe, Osami Wada, Ryuji Koga

    MEMOIRS OF THE FACULTY OF ENGINEERING, OKAYAMA UNIVERSITY   2002

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  • Analytical simulation of radiated emission from power bus noise on PCB with linear macro-model of IC/LSI

    Osami Wada, Zhi Liang Wang, Yukihiro Fukumoto, Yoshitaka Toyota, Ryuji Koga

    XXVIth General Assembly of the International Union of Radio Science(URSI)   2002

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  • Analysis of Cascade Microring-Resonator Type of Interleave Filter

    Iip Syarif Hidayat, Yoshitaka Toyota, Osami Wada, Ryuji Koga

    Asia-Pacific Conference on Communications (APCC 2002)   2002

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  • Estimation of common-mode EMI caused by a signal line in the vicinity of ground edge on a PCB

    T Watanabe, O Wada, Y Toyota, R Koga

    2002 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, VOLS 1 AND 2, SYMPOSIUM RECORD   113 - 118   2002

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    The authors have developed an estimation method of common mode radiation from a PCB. A parameter named 'current division factor' explains a generation mechanism of the common mode. Rigorous analysis, instead of rough approximation, is required to calculate the factor for an asymmetric structure. A 2-dimentional static electric field analysis by the boundary, element method (BEM) is applied to this calculation, which requires less time than 3-dimentional simulations. EMI increases when the signal line comes close to the edge of ground pattern. The effect is evaluated with the simulation of the factor. The estimation agrees well with measurement within 1 dB.

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  • Radiated emission analysis of power bus noise by using a power current model of an LSI

    Y Fukumoto, O Shibata, K Takayama, T Kinoshita, ZL Wang, Y Toyota, O Wada, R Koga

    2002 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, VOLS 1 AND 2, SYMPOSIUM RECORD   1037 - 1042   2002

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    In this paper a power current model of an LSI, which was proposed at the last Symposium [5][6], was used for analysis of radiated emissions. The simulated radiation noise was compared with measurements by using an evaluation module that emulates an LSI. The simulation results showed good agreement with the measurement results. The effects of adding an internal decoupling capacitance and/or internal decoupling inductance to an LSI were also evaluated.

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  • 岡山・福山における偏光ライダーによる対流圏同時観測

    五百旗頭健吾, 香川直己, 豊田啓孝, 和田修己, 古賀隆治

    応用物理学会学術講演会講演予稿集   63rd ( 3 )   2002

  • Numerical analysis of optical ring resonators with double-ring structure to extend their FSR

    TOYOTA Yoshitaka, HIDAYAT Iip SYARIF, TORIGOE Osamu, ICHI-UMA Satoru, WADA Osami, KOGA Ryuji

    Technical report of IEICE. OPE   101 ( 504 )   37 - 42   2001.12

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    A ring resonator with wider FSR is expected as an Add/Drop filter for the WDM system. In ring resonators, wider FSR is incompatible with less bending loss, because the FSR of a ring resonator is proportional to the inverse of its radius. Therefore the double-ring structure has been proposed to solve this problem. We analyzed this structure by the method based on the transfer matrix principle and signal flow chart. As a result, the FSR of more than 4THz and twenty times as wide as the one of single-ring structure is obtained. Moreover, the proper transmission characteristics are obtained for the structure of the input waveguide coupled with outer ring and output waveguide coupled with inner ring, and vice versa.

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  • A simple method for measuring the relative permittivity of printed circuit board materials

    A Namba, S Wada, Y Toyota, Y Fukumoto, ZL Wang, R Koga, T Miyashita, T Watanabe

    IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY   43 ( 4 )   515 - 519   2001.11

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    This paper presents a simple method to measure the relative permittivity of glass-epoxy printed circuit boards (PCBS). In this method, relative permittivity as a function of frequency is measured using an actual PCB. In order to estimate relative permittivity, the reflection coefficient is measured with a network analyzer. Relative permittivity is calculated by observing the frequencies of the resonant cavity modes. We show that the relative permittivity of a FR-4 sample decreases from 4.3 to 4.2 at frequencies from 300 MHz to 2 GHz.

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  • Power current model of LSI/IC containing equivalent internal impedance for EMI analysis of digital circuits

    Y Fukumoto, Y Takahata, O Wada, Y Toyota, T Miyashita, R Koga

    IEICE TRANSACTIONS ON COMMUNICATIONS   E84B ( 11 )   3041 - 3049   2001.11

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    This paper investigates a device model of the power current used for an LSI/IC. The model is proposed to analyze the power bus noise in digital circuit boards. This model is defined in the frequency domain and constructed with an equivalent internal impedance and an equivalent internal current source. Accordingly, the output current of the model is affected by power bus impedance, such as the capacitance of bypass capacitors and the parasitic inductance of power bus wiring. Therefore, the model is useful for analyzing the effectiveness of bypass capacitors and power bus wiring. The structure of equivalent internal impedance for a simple logic IC, such as 74HCXX, can be represented as an RLC series circuit. These parameters are identified by applying the least square method. To demonstrate the validity of the model, an experimental study was conducted. As a result, it was shown that the output current of the model corresponds to the measured current under a variety of power bus impedance levels within 6 dB.

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  • C-3-46 Analysis of Interleaver with Double-Cavity Ring-Resonator Structure

    Hidayat I.S., Ohnishi M., Ichi-uma S., Toyota Y., Wada O., Koga R.

    Proceedings of the Society Conference of IEICE   2001 ( 1 )   156 - 156   2001.8

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  • Spectrum analysis of amplitude-expanded pulse generated by pillbox-type optical modulator

    Ichi-uma Satoru, Hidayat Iip Syarif, Toyota Yoshitaka, Wada Osami, Koga Ryuji

    Proceedings of the Society Conference of IEICE   2001 ( 1 )   115 - 115   2001.8

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  • Power Current Simulation for EMC Design of LSI

    TAKAYAMA Keisuke, KINOSHITA Tomohiro, MATSUNAGA Shigeki, WANG Zhi Liang, TOYOTA Yoshitaka, WADA Osami, KOGA Ryuji, FUKUMOTO Yukihiro, SHIBATA Osamu

    IEICE technical report. Electromagnetic compatibility   101 ( 178 )   73 - 78   2001.7

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    High frequency currents flowing from power terminals of an IC/LSI onto power/ground planes of a digital printed circuit board can generate a great amount of electromagnetic noise. A power current model of an IC/LSI for EMI simulation was proposed in our previous studies. This report describes the mechanism and quantitative effect of reducing high frequency currnts on power/ground terminals by embedding a decoupling inductor and/or a bypass capacitor in an IC/LSI package. Furthermore, the above internal decoupling effect on suppressing EMI radiated from the board is verfied in both the simulations and measurements.

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  • Stable inversion method for a polarized-lidar: analysis and simulation

    H Wei, R Koga, K Iokibe, O Wada, Y Toyota

    JOURNAL OF THE OPTICAL SOCIETY OF AMERICA A-OPTICS IMAGE SCIENCE AND VISION   18 ( 2 )   392 - 398   2001.2

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    A new inversion inhomogeneous atmosphere (IA) method that is more stable than Fernald's method for two-component (molecule and aerosol) scattering analysis of polarized Mie lidar signals is proposed and examined. The backscattering coefficient and the extinction-to-backscattering ratio (EBR) can be calculated for specified regions at which the depolarization ratio is less than that of molecule without further assumptions. The inversion procedure can be extended to both inward stepwise and outward stepwise integration algorithms. Simulation results indicate that a higher precision was achieved with the IA method than with Fernald's method in terms of error and random noise in estimating boundary value and EBR. Experimental results were also better with the IA method than with Fernald's method. (C) 2001 Optical Society of America OCIS codes: 280.0280, 280.3640, 280.1100.

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  • Numerical analysis of amplitude-expanded pulse generation in pillbox-type optical modulator

    TOYOTA Yoshitaka, WADA Osami, KOGA Ryuji

    Technical report of IEICE. OPE   100 ( 590 )   1 - 6   2001.1

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    We propose an optical modulator which is composed of thin disk pillbox-type resonators, coupling waveguides, and electrodes. Considering proton exchanged LiNbO_3 as a material, frequency characterisitcs of a pillbox-type optical modulator is numerically analyzed with scattering matrices. Amplitude-expanded pulse generation for modulation signals, such as sinusoidal wave and triangle pulse, is numerically calculated by changing modulation frequency. As a result, the mechanism of the amplitude-expanded pulse generation is clarified, and it is found that the amplitude of output pulse in theory is 9 times as large as the one of CW input.

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  • Reduction of Q-factor of resonance in power/ground planes of multilayer PCBs by using resistive metal films

    Zhi Liang Wang, Osami Wada, Yoshitaka Toyota, Ryuji Koga

    Trans. Inst. Electr. Eng. Jpn. A   2001

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  • Depolarization properties of Asian dust (Kosa) measured in 1998-2000 at Okayama, Japan

    H Wei, R Koga, K Iokibe, O Wada, Y Toyota, N Kagawa

    LIDAR REMOTE SENSING FOR INDUSTRY AND ENVIRONMENT MONITORING   4153   559 - 566   2001

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    A Mie lidar system was built at Okayama University in 1998. The system is featured by the ability of discriminating depolarization of received signals with a spatial resolution of 15m. Examinations were conducted on the received range-normalized signal and the depolarization ratio from Asian dust. Intense Asian dust occurred in springs of 1998-2000.
    Vertical distribution of Asian dust was found to be inhomogeneous contrary to the homogeneity assumption employed in preceding works. Multiple scattering in the layers of Asian dust also observed. Complicated structure of Asian dust wrapped by liquid or water droplets were also conjectured from the sudden changes of depolarization ratio in Asian dust layers.

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  • Power current model of LSI and parameter identification for EMI simulation of digital PCBs

    Y Fukumoto, T Matsuishi, T Kinoshita, O Wada, Y Toyota, R Koga

    2001 IEEE EMC INTERNATIONAL SYMPOSIUM, VOLS 1 AND 2   1185 - 1190   2001

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    A power current model of LSIs for EMI simulation of digital printed circuit boards, and a parameter identification method based on the model are presented. The model consists of equivalent internal impedance and an equivalent internal current source. The equivalent internal impedance is obtained by measuring the impedance between the power and ground terminal of an LSI by means of an impedance analyzer, and an equivalent internal source is obtained from the measured current through the power terminal under the conditions of known external impedance. Furthermore, it is shown that simulation results generated using this model have good agreement with the results of measurements made under a range of external impedances.

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  • Local Decoupling Effects of Decoupling Capacitors on a Multilayer PCB : Fast Analysis by a Closed-Form Expression

    WADA Osami, WANG Zhi Liang, TOYOTA Yoshitaka, KOGA Ryuji

    EMCJ   100 ( 510 )   85 - 90   2000.12

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    Decoupling capacitors are often utilized to mitigate ground bounce and EMI problems in a printed circuit board (PCB). In this report, a new modeling approach to investigate the decoupling is proposed, based on a closed-form expression for the Z-matrix of the power/ground planes in a multi-layer PCB together with the lumped circuit models of decoupling capacitors. The calculated results show that the input impedance which determines the excitation efficiency of the power/ground resonances is locally decreased by a decoupling capacitor closely spaced to the excitation port. The local decoupling effect is quantitatiely presented as a function of the spacing between the excitation port and the local decoupling capacitor.

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  • An Improved Closed-Form Expression for Accurate and Rapid Calculation of Power/Ground Plane Impedance in Multilayer PCBs

    WANG Zhi Liang, WADA Osami, TOYOTA Yoshitaka, KOGA Ryuji

    2000 ( 65 )   17 - 23   2000.10

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  • Parameter Identification for a power current model of LSI

    FUKUMOTO Yukihiro, MATSUISHI Takuya, TOYOTA Yoshitaka, WADA Osami, KOGA Ryuji

    EMCJ   100 ( 207 )   49 - 54   2000.7

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    A power terminal model, which represents high frequency current on power terminal of IC/LSI, in necessary to perform power bus noise simulations of digital printed circuit boards. In this report, the model, which has equivalent internal impedance and an equivalent internal current source, is proposed. The model can express high frequency current which is affected by the impedance of bypass capacitors and power bus traces on printed circuit board. Parameters in the equivalent internal impedance are given by the impedance analyzer, and the equivalent internal current source can be calculated by measured high frequency current which is obtained under certain external impedance. Furthermore, it is shown that outputs of the model give good agreement with experimental results under various conditions of external impedance.

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  • Power decoupling circuit for modeling and measurement of EMC characteristics of IC/LSI

    R Koga, O Wada, Y Toyota, T Miyashita, Y Fukumoto, A Namba, Y Takahata, N Kagawa

    ASIA-PACIFIC CONFERENCE ON ENVIRONMENTAL ELECTROMAGNETICS: CEEM'2000, PROCEEDINGS   444 - 448   2000

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    Language:English   Publisher:PUBLISHING HOUSE BEIJING UNIV POSTS & TELECOMMUNICATIONS  

    DOI: 10.1109/CEEM.2000.853983

    Web of Science

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  • Reducing Q-factors of Resonances in Power/Ground Planes of Multilayer PCBs by Using Resistive Metallic Layers

    Zhi Liang Wang, Osami Wada, Yoshitaka Toyota, Ryuji Koga

    Proceedings of the 2000 Japan-China Joint Meeting on Optical Fiber Science and Electromagnetic Theory (OFSET) 2000   2000

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  • Observation of Kosa with Mie Lidar at Okayama in the Spring of 2000

    Ryuji Koga, Kengo Iokibe, He Wei, Osami Wada, Yoshitaka Toyota, Naoki Kagawa

    The Proceedings of Asian Lidar Observation Network Conference 2000   2000

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  • Power Current Model of Digital IC with Internal Impedance for Power Decoupling Simulation

    Osami Wada, Yasuo Takahata, Yoshitaka Toyota, Ryuji Koga, Takuya Miyashita, Yukihiro Fukumoto

    4th European Symposium on Electromagnetic Compatibility Proceedings   2000

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  • Depolarization properties of Asian dust (KOSA) measured by LIDAR in Okayama in the spring of 1998

    He Wei, Ryuji Koga, Kengo Iokibe, Osami Wada, Yoshitaka Toyota

    Memoirs of the Faculty of Engineering, Okayama University   2000

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  • Amplitude-expanded pulse generated by pillbox-type optical modulator

    SUGA Kunihiro, SHIGE Hideki, TOYODA Yoshitaka, WADA Osami, KOGA Ryuji

    Proceedings of the IEICE General Conference   311 - 311   1999

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    Language:Japanese   Publisher:The Institute of Electronics, Information and Communication Engineers  

    CiNii Article

    CiNii Books

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  • Yield Measurement of Secondary Electrons Emitted from Silicon Dioxide Film in Negative-Ion Bombardment

    Toyota Yoshitaka, Tsuji Hiroshi, Gotoh Yasuhito, Ishikawa Junzo

    Jpn J Appl Phys   35 ( 9 )   4785 - 4788   1996.9

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    The yield of secondary electrons emitted from insulating materials subjected to negative-ion bombardment was studied. In general, such measurements for insulating materials are difficult because surface charging due to ion implantation makes the apparent yield unity. We used silicon dioxide (SiO2) film and a small ion current for the yield measurements. As a result, charge compensation due to the leakage current minimized the surface charging and the true yield was obtained. The experimental results showed that secondary electrons emitted due to negative-ion bombardment consist of electrons due to both kinetic emission and detachment from negative ions. In addition, it was found that the yield depends on the ion species. It was concluded that the same tendencies as those for negative-ion-implanted conductive materials are observed.

    DOI: 10.1143/JJAP.35.4785

    CiNii Article

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  • Fundamental study on powder-scattering in positive- and negative-ion implantation into powder materials

    Hiroshi Tsuji, Junzo Ishikawa, Hajime Itoh, Yoshitaka Toyota, Yasuhito Gotoh

    Applied Surface Science   100-101   342 - 346   1996

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    The scattering of powder particles is caused by charging in the ion implantation of positive ions into dielectric powders without a charge compensation, this makes dose control difficult. We have studied the particle-scattering phenomenon in ion implantation into spherical powders both theoretically and experimentally. Taking into account Coulomb force, Van der Waals force and a gravity working on a sphere, the force balance equation was driven to give the threshold charging voltage above which the charged sphere begins to be scattered. In positive-argon-ion implantation into three oxide powders at an average size of 5, 115 and 425 μm, particle-scattering was observed above each ion-acceleration voltage (i.e., charging voltage) of 6.5, 1.0 and 2.7 kV, respectively. These voltages were in good agreement with the predicted threshold charging voltages. Conversely, in the negative-carbon-ion implantation, on the contrary, there was no scattering for all samples even at an ion acceleration voltage of 20 kV. The negative-ion implantation technique was found to be a non-scattering implantation method for powders.

    DOI: 10.1016/0169-4332(96)00238-3

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  • Fundamental study on powder-scattering in positive- and negative-ion implantation into powder materials

    Hiroshi Tsuji, Junzo Ishikawa, Hajime Itoh, Yoshitaka Toyota, Yasuhito Gotoh

    Applied Surface Science   100-101   342 - 346   1996

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    Language:English   Publisher:Elsevier  

    The scattering of powder particles is caused by charging in the ion implantation of positive ions into dielectric powders without a charge compensation, this makes dose control difficult. We have studied the particle-scattering phenomenon in ion implantation into spherical powders both theoretically and experimentally. Taking into account Coulomb force, Van der Waals force and a gravity working on a sphere, the force balance equation was driven to give the threshold charging voltage above which the charged sphere begins to be scattered. In positive-argon-ion implantation into three oxide powders at an average size of 5, 115 and 425 μm, particle-scattering was observed above each ion-acceleration voltage (i.e., charging voltage) of 6.5, 1.0 and 2.7 kV, respectively. These voltages were in good agreement with the predicted threshold charging voltages. Conversely, in the negative-carbon-ion implantation, on the contrary, there was no scattering for all samples even at an ion acceleration voltage of 20 kV. The negative-ion implantation technique was found to be a non-scattering implantation method for powders.

    DOI: 10.1016/0169-4332(96)00238-3

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  • Charging phenomenon of insulators in negative-ion implantation

    Yoshitaka Toyota, Hiroshi Tsuji, Shoji Nagumo, Yasuhito Gotoh, Junzo Ishikawa

    Applied Surface Science   100-101   360 - 364   1996

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    Language:English   Publisher:Elsevier  

    The energy distribution of secondary electrons emitted from an insulator during negative-ion implantation was measured. According to secondary-electron-energy analysis, the charging voltage of insulator was estimated from the measured energy distribution. The experimental results in negative-carbon-ion implantation showed that the charging voltages of a quartz glass plate and a photoresist film on silicon substrate are several negative volts in the energy range from 5 to 35 keV and decrease gradually with increasing ion energy. The low negative charging voltage of insulator and the most probable energy of the secondary-electron energy distribution during negative-ion implantation are discussed using a charging model based on an electric double layer.

    DOI: 10.1016/0169-4332(96)00242-5

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  • Charging phenomenon of insulators in negative-ion implantation

    Yoshitaka Toyota, Hiroshi Tsuji, Shoji Nagumo, Yasuhito Gotoh, Junzo Ishikawa

    Applied Surface Science   100-101   360 - 364   1996

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    Language:English   Publisher:Elsevier  

    The energy distribution of secondary electrons emitted from an insulator during negative-ion implantation was measured. According to secondary-electron-energy analysis, the charging voltage of insulator was estimated from the measured energy distribution. The experimental results in negative-carbon-ion implantation showed that the charging voltages of a quartz glass plate and a photoresist film on silicon substrate are several negative volts in the energy range from 5 to 35 keV and decrease gradually with increasing ion energy. The low negative charging voltage of insulator and the most probable energy of the secondary-electron energy distribution during negative-ion implantation are discussed using a charging model based on an electric double layer.

    DOI: 10.1016/0169-4332(96)00242-5

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  • Yield Measurement of Secondary Electrons Emitted from Silicon Dioxide Film in Negative-Ion Bombardment.

    Toyota Yoshitaka, Tsuji Hiroshi, Gotoh Yasuhito, Ishikawa Junzo

    Japanese Journal of Applied Physics   35 ( 9A )   4785 - 4788   1996

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    Language:English   Publisher:The Japan Society of Applied Physics  

    The yield of secondary electrons emitted from insulating materials subjected to negative-ion bombardment was studied. In general, such measurements for insulating materials are difficult because surface charging due to ion implantation makes the apparent yield unity. We used silicon dioxide (SiO2) film and a small ion current for the yield measurements. As a result, charge compensation due to the leakage current minimized the surface charging and the true yield was obtained. The experimental results showed that secondary electrons emitted due to negative-ion bombardment consist of electrons due to both kinetic emission and detachment from negative ions. In addition, it was found that the yield depends on the ion species. It was concluded that the same tendencies as those for negative-ion-implanted conductive materials are observed.

    DOI: 10.1143/JJAP.35.4785

    CiNii Article

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  • Negative-Fluorine-Ion Extraction from RF Plasma-Sputter-Type Heavy Negative-Ion Source using SF_6 Gas

    TSUJI Hiroshi, TOMITA Tetsuo, TOYOTA Yoshitaka, GOTOH Yasuhito, ISHIKAWA Junzo

    38 ( 9 )   769 - 769   1995.9

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  • Negative-ion implantation technique

    Junzo Ishikawa, Hiroshi Tsuji, Yoshitaka Toyota, Yasuhito Gotoh, Koji Matsuda, Masayasu Tanjyo, Shigeki Sakai

    Nuclear Inst. and Methods in Physics Research, B   96 ( 1-2 )   7 - 12   1995.3

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    Negative-ion implantation is a promising technique for charging-free implantation for the forthcoming ULSI fabrication, in which the water charging by positive-ion implantation will become a troublesome problem even with an electron shower. The negative-ion implantation technique remarkably ameliorates such a charging problem since the incoming negative charge of implanted negative ions is easily balanced by the outgoing negative charge of a part of secondary electrons. Thus, the surface charging voltage is maintained to within about ± 10 V for isolated conducting materials and insulators, and is free from space and time fluctuations. A high-current negative-ion source and a medium current negative-ion implanter developed for this technique are described with the design concepts. In addition, the fundamental measurements of interactions between the negative-ion beam and the gas/solid are also described. © 1995.

    DOI: 10.1016/0168-583X(94)00444-7

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  • Negative-ion implantation technique

    Junzo Ishikawa, Hiroshi Tsuji, Yoshitaka Toyota, Yasuhito Gotoh, Koji Matsuda, Masayasu Tanjyo, Shigeki Sakai

    Nuclear Inst. and Methods in Physics Research, B   96 ( 1-2 )   7 - 12   1995.3

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    Negative-ion implantation is a promising technique for charging-free implantation for the forthcoming ULSI fabrication, in which the water charging by positive-ion implantation will become a troublesome problem even with an electron shower. The negative-ion implantation technique remarkably ameliorates such a charging problem since the incoming negative charge of implanted negative ions is easily balanced by the outgoing negative charge of a part of secondary electrons. Thus, the surface charging voltage is maintained to within about ± 10 V for isolated conducting materials and insulators, and is free from space and time fluctuations. A high-current negative-ion source and a medium current negative-ion implanter developed for this technique are described with the design concepts. In addition, the fundamental measurements of interactions between the negative-ion beam and the gas/solid are also described. © 1995.

    DOI: 10.1016/0168-583X(94)00444-7

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  • The charging mechanism of insulated electrode in negative-ion implantation

    Shigeki Sakai, Yasuhito Gotoh, Hiroshi Tsuji, Yoshitaka Toyota, Junzo Ishikawa, Masayasu Tanjyo, Koji Matsuda

    Nuclear Inst. and Methods in Physics Research, B   96 ( 1-2 )   43 - 47   1995.3

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    The wafer charging during ion implantation is a serious problem with greater levels of circuit integration in semiconductor device fibracations. Positive charges are accumulated on insulated electrodes or insulators and cause dielectric breakdown if there is no compensation of charging. Ion implantation with negative ions is one of the hopeful techniques to solve this problem. Since an incident ion is a negative charge, an incoming negative charge and an outgoing negative charge of secondary electrons will achieve electrical equilibrium on the insulated electrode. Therefore the charging voltage is extremely low because of this electrical equilibrium. We have measured the charging voltage at several energies of negative ions and also simulated the charging voltage with varying secondary-electron emission factor. We have found that the charging voltage depends on the secondary-electron emission factor. © 1995.

    DOI: 10.1016/0168-583X(94)00451-X

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  • Negative-ion implantation technique

    Junzo Ishikawa, Hiroshi Tsuji, Yoshitaka Toyota, Yasuhito Gotoh, Koji Matsuda, Masayasu Tanjyo, Shigeki Sakai

    Nuclear Inst. and Methods in Physics Research, B   96 ( 1-2 )   7 - 12   1995.3

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    Language:English  

    Negative-ion implantation is a promising technique for charging-free implantation for the forthcoming ULSI fabrication, in which the water charging by positive-ion implantation will become a troublesome problem even with an electron shower. The negative-ion implantation technique remarkably ameliorates such a charging problem since the incoming negative charge of implanted negative ions is easily balanced by the outgoing negative charge of a part of secondary electrons. Thus, the surface charging voltage is maintained to within about ± 10 V for isolated conducting materials and insulators, and is free from space and time fluctuations. A high-current negative-ion source and a medium current negative-ion implanter developed for this technique are described with the design concepts. In addition, the fundamental measurements of interactions between the negative-ion beam and the gas/solid are also described. © 1995.

    DOI: 10.1016/0168-583X(94)00444-7

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  • The charging mechanism of insulated electrode in negative-ion implantation

    Shigeki Sakai, Yasuhito Gotoh, Hiroshi Tsuji, Yoshitaka Toyota, Junzo Ishikawa, Masayasu Tanjyo, Koji Matsuda

    Nuclear Inst. and Methods in Physics Research, B   96 ( 1-2 )   43 - 47   1995.3

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    Language:English  

    The wafer charging during ion implantation is a serious problem with greater levels of circuit integration in semiconductor device fibracations. Positive charges are accumulated on insulated electrodes or insulators and cause dielectric breakdown if there is no compensation of charging. Ion implantation with negative ions is one of the hopeful techniques to solve this problem. Since an incident ion is a negative charge, an incoming negative charge and an outgoing negative charge of secondary electrons will achieve electrical equilibrium on the insulated electrode. Therefore the charging voltage is extremely low because of this electrical equilibrium. We have measured the charging voltage at several energies of negative ions and also simulated the charging voltage with varying secondary-electron emission factor. We have found that the charging voltage depends on the secondary-electron emission factor. © 1995.

    DOI: 10.1016/0168-583X(94)00451-X

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  • The charging mechanism of insulated electrode in negative-ion implantation

    Shigeki Sakai, Yasuhito Gotoh, Hiroshi Tsuji, Yoshitaka Toyota, Junzo Ishikawa, Masayasu Tanjyo, Koji Matsuda

    Nuclear Inst. and Methods in Physics Research, B   96 ( 1-2 )   43 - 47   1995.3

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    Language:English  

    The wafer charging during ion implantation is a serious problem with greater levels of circuit integration in semiconductor device fibracations. Positive charges are accumulated on insulated electrodes or insulators and cause dielectric breakdown if there is no compensation of charging. Ion implantation with negative ions is one of the hopeful techniques to solve this problem. Since an incident ion is a negative charge, an incoming negative charge and an outgoing negative charge of secondary electrons will achieve electrical equilibrium on the insulated electrode. Therefore the charging voltage is extremely low because of this electrical equilibrium. We have measured the charging voltage at several energies of negative ions and also simulated the charging voltage with varying secondary-electron emission factor. We have found that the charging voltage depends on the secondary-electron emission factor. © 1995.

    DOI: 10.1016/0168-583X(94)00451-X

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  • Charging Potential Measurement of Photoresist-Layer Surface during Negative-Ion Implantation from Ion-Induced Secondary Electron Energy Analysis

    Hiroshi Tsuji, Shoji Nagumo, Yoshitaka Toyota, Shigeki Sakai, Yasuhito Gotoh, Junzo Ishikawa

    Shinku   38 ( 3 )   221 - 223   1995

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  • Evaluation of Charging Model in Negative-Ion Implantation

    Yoshitaka Toyota, Hiroshi Tsuji, Shoji Nagumo, Shigeki Sakai, Yasuhito Gotoh, Junzo Ishikawa, Koji Matsuda

    Shinku   38 ( 3 )   224 - 227   1995

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  • Energy distribution and yield measurement of secondary electrons to evaluate the equilibrium charging voltage of an isolated electrode during negative-ion implantation

    Yoshitaka Toyota, Hiroshi Tsuji, Yasuhito Gotoh, Junzo Ishikawa

    Japanese Journal of Applied Physics   34 ( 12 )   6487 - 6491   1995

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    The negative-ion implantation method has the advantage that the charging voltage of an isolated electrode, or electrically insulated conductive material, stays as low as at most +10 V during implantation without any charge neutralization. The significant parameters, the energy distribution and the yield of secondary electrons in negative-ion implantation, have been measured in the energy range below 40 keV. The results show that the energy distribution, which is independent of ion energy in shape, has a low energy peak together with a long tail extending toward the high-energy region, and that the yield increases with ion energy. Furthermore, the equilibrium charging-voltage equation of an isolated electrode during negative-ion implantation is presented. The charging voltages estimated according to the equation are found to be in good agreement with those measured directly with a high-input-impedance voltmeter. It is also demonstrated that the charging voltage is proportional to the yield and to ion velocity in the linear region of the kinetic electron emission. © 1995 The Japan Society of Applied Physics.

    DOI: 10.1143/JJAP.34.6487

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  • Negative-Ion Current Density Dependence of the Surface Potential of Insulated Electrode During Negative-Ion Implantation

    Hiroshi Tsuji, Shigeki Sakai, Yoshio Okayama, Yoshitaka Toyota, Yasuhito Gotoh, Kouji Matsuda, Masayasu Tanjyo, Junzo Ishikawa

    Shinku   37 ( 3 )   135 - 138   1994

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  • Surface Potential Measurement of the Insulator with Secondary Electron Caused by Negative Ion Implantation

    Hiroshi Tsuji, Yoshitaka Toyota, Syoji Nagumo, Yasuhito Gotoh, Junzo Ishikawa, Shigeki Sakai, Masayasu Taniyo, Kohji Matsuda

    Shinku   37 ( 3 )   139 - 142   1994

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Presentations

  • ブラシモータの温度依存性を考慮したノイズ源等価回路モデルのパラメータ同定と伝導妨害波予測

    菅翔平, 上本篤志, 許振鴻, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会2021年ソサイエティ大会 

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    Event date: 2021.9.14 - 2021.9.17

    Language:Japanese   Presentation type:Oral presentation (general)  

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  • 有線ネットワーク下のM系列変調TDRにおけるk近傍法を適用した異常位置検知

    亀山大樹, 安原朝陽, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会2021年ソサイエティ大会 

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    Event date: 2021.9.14 - 2021.9.17

    Language:Japanese   Presentation type:Oral presentation (general)  

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  • ツイストペアケーブルからの不要放射評価

    五十嵐俊, 宮脇大輔, 山岸傑, 桑山一郎, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会総合大会 

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    Event date: 2021.3.9 - 2021.3.12

    Language:Japanese   Presentation type:Oral presentation (general)  

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  • サイドチャネル攻撃耐性設計を目的とした相関係数と波形数の関係式の検証

    竹﨑彬隼, 五百旗頭健吾, 豊田啓孝

    2020年暗号と情報セキュリティシンポジウム予稿集 

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    Event date: 2021.1.28 - 2021.1.31

    Language:Japanese   Presentation type:Oral presentation (general)  

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  • コモンモード放射シミュレーション用電流配分率算出のためのコネクタの簡易モデル構築

    豊田啓孝, 金尾奨, 佐田野勝水, 五百旗頭健吾

    第34回エレクトロニクス実装学会春季講演大会 

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    Event date: 2020.3.3 - 2020.3.5

    Language:Japanese   Presentation type:Oral presentation (general)  

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  • PSD手法を用いたビアレス・オープンスタブ型EBG構造の設計

    金尾奨, 奥山友貴, 五百旗頭健吾, 豊田啓孝

    2019年電子情報通信学会総合大会 

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    Event date: 2019.3.19 - 2019.3.22

    Language:Japanese   Presentation type:Oral presentation (general)  

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  • 周期構造を有する隣接差動線路間のディファレンシャルモードクロストークの低減メカニズム

    王晨宇, 竹田大晃, 五百旗頭健吾, 豊田啓孝

    2019年電子情報通信学会総合大会 

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    Event date: 2019.3.19 - 2019.3.22

    Language:Japanese   Presentation type:Oral presentation (general)  

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  • 差分電力解析におけるサイドチャネル波形のSNRと相関係数の関係式パラメータの実験による同定

    手嶋俊彰, 五百旗頭健吾, 豊田啓孝, 矢野佑典

    暗号と情報セキュリティシンポジウム (SCIS2019) 

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    Event date: 2019.1.22 - 2019.1.25

    Language:Japanese   Presentation type:Oral presentation (general)  

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  • 高密度配線で低クロストークを実現する周期構造差動線路の設計と評価

    竹内智哉, 五百旗頭健吾, 豊田啓孝

    エレクトロニクス実装学会令和3年度第2回システム設計研究会  2021.12.17 

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  • 配線の平衡度差に起因する不要電磁放射シミュレーション Invited

    豊田啓孝

    第27回EMC環境フォーラム EMC設計とシミュレーション  2021.11.26 

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    Language:Japanese   Presentation type:Public lecture, seminar, tutorial, course, or other speech  

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  • 損失を有する共振器型フィルタの平行平板共振抑制時における不要電磁放射の評価

    児玉秀平, 金尾奨, 五百旗頭健吾, 豊田啓孝

    2021年度(第72回)電気・情報関連学会中国支部連合大会  2021.10.23 

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  • 検出感度向上のためのM系列変調TDRにおける設定パラメータの検討-方形波パルスの場合-

    羽村花音, 亀山大樹, 五百旗頭健吾, 豊田啓孝

    2021年度(第72回)電気・情報関連学会中国支部連合大会  2021.10.23 

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  • DC/DCコンバータのノイズ源等価回路モデルによる伝導妨害波予測の適用範囲の検討

    大原未緒, 張書奇, 五百旗頭健吾, 豊田啓孝

    2021年度(第72回)電気・情報関連学会中国支部連合大会  2021.10.23 

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  • ブラシモータの温度依存性を考慮したノイズ源等価回路モデルのパラメータ同定と伝導妨害波予測

    許振鴻, 菅翔平, 五百旗頭健吾, 豊田啓孝

    2021年度(第72回)電気・情報関連学会中国支部連合大会  2021.10.23 

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  • 線路の不連続部におけるモード変換によるノイズ発生モデルとその評価 Invited

    豊田啓孝

    ギガビット研究会第38回特別シンポジウム  2021.9.22 

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    Language:Japanese   Presentation type:Symposium, workshop panel (nominated)  

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  • ブラシモータを有する可動装置のEMI評価に向けたノイズ電流および不要電磁放射のモデル化の初期検討

    上本篤志, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会環境電磁工学研究会  2021.7.19 

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  • 手戻りのないEMC性能レビュー実現のための配線の平衡度差に着目した電磁妨害波要因分析

    金尾奨, 川島渉, 五百旗頭健吾, 高津宏明, 野村毅, 辻本隆浩, 豊田啓孝

    エレクトロニクス実装学会令和3年度第1回システム設計研究会  2021.6.15 

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  • 実機のサイドチャネル攻撃耐性評価を目的とした時間・周波数領域相関電力解析

    日室雅貴, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会環境電磁工学研究会  2021.4.16 

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  • DC/DCコンバータのターンオン・ターンオフに着目したノイズ源等価回路モデルのパラメータ同定と伝導妨害波の評価

    上松大志, 張書奇, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会環境電磁工学研究会  2020.12.11 

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  • 暗号ICの電力解析攻撃耐性評価基板に対する要求仕様の検討 ~PDNの伝達インピーダンスの漏洩強度への寄与~

    菅智信, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会ハードウェアセキュリティ研究会  2020.10.26 

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  • 高密度配線における非対称構造差動線路を用いたモード変換抑制

    竹内智哉, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会環境電磁工学研究会  2020.5.15 

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  • M系列変調TDRによる有線ネットワークのインピーダンス不連続点特定の基礎検討

    亀山大樹, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会環境電磁工学研究会  2020.5.15 

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  • 電源系デカップリングによるサイドチャネル攻撃対策効果の伝達インピーダンスに基づく予測の試み

    五百旗頭健吾, 矢野佑典, 豊田啓孝

    電子情報通信学会環境電磁工学研究会  2020.1.17 

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  • AES暗号回路へのクロックグリッチを道いた故障利用攻撃に対する安全性評価手法の検討

    原成希, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会ハードウェアセキュリティ研究会  2019.12.6 

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  • ノイズ源振幅変調と相関解析による電磁妨害波源推定法のパワエレ回路への適用に向けた一検討

    川島渉, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会環境電磁工学研究会  2019.7.18 

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  • PSD手法における設計パラメータの正規化によるロバスト性の向上―ビアレス・オープンスタブ型EBG構造の場合―

    金尾奨, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会環境電磁工学研究会  2019.7.18 

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  • プリント回路基板からの不要電磁波放射のメカニズムと抑制手法 Invited

    豊田啓孝

    ネクスト香川「EMC研究会」  2019.6.20 

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  • ノイズ源等価回路モデルを用いたDC/DC コンバータにおける伝導妨害波電圧の予測精度向上に向けた検討

    上松大志, 大崎悠平, 矢野佑典, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会環境電磁工学研究会  2019.4.11 

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  • 筋電義手からの不要電磁放射とその評価法の検討

    豊田啓孝

    ギガビット研究会第11回ウェアラブル分科会  2019.3.28 

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  • DC/DCコンバータの2ポートノイズ源等価回路モデルにおけるパラメータ抽出の改善による予測精度向上

    大崎悠平, 矢野佑典, 上松大志, 五百旗頭健吾, 豊田啓孝

    電子情報通信学会環境電磁工学研究会  2015.1.18 

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  • 内部電流波形に基づくAES回路のサイドチャネル情報漏洩特性の考察

    2015年 暗号と情報セキュリティシンポジウム(SCIS2015), 2F3-1  2015 

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  • 筋電義手からの放射量評価法の検討

    ギガビット研究会第5回ウェアラブル分科会  2015 

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  • フェライト膜の電気的特性を考慮した損失を有する共振器型フィルタの設計

    電子情報通信学会環境電磁工学研究会, EMCJ2015-86, pp.31-36  2015 

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  • 1バイト誤りを起こす時間幅を統計的に表わすサンプル数の検討

    第7回ホットチャネルワークショップ  2015 

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  • ノイズの発生とその対策

    京都地域スーパークラスタープログラム平成27年度「社会人パワーエレクトロニクス講座(応用編①)-EMC」  2015 

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  • 差動線路の屈曲部における非対称テーパ導入による伝送特性改善効果の評価

    エレクトロニクス実装学会平成27年度第3回超高速・高周波エレクトロニクス実装研究会, Vol. 15, No. 3, pp.1-6  2015 

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  • 電源系配線におけるモード変換位置へのコンデンサ実装によるコモンモードノイズ発生量の低減

    電子情報通信学会環境電磁工学研究会, EMCJ2015-9, pp.7-12  2015 

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  • IC電源供給回路共振抑制を目的としたオンボードRLスナバの最適パラメータ検討

    2015年電子情報通信学会ソサイエティ大会, B-4-47, p. 260  2015 

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  • 線路の不連続部におけるモード変換によるノイズ発生

    ギガビット研究会第17回特別シンポジウム  2015 

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  • アルカリ金属のスピン偏極を用いた低周波電磁波計測の検討

    電子情報通信学会環境電磁工学研究会, EMCJ2015-15, pp.43-48  2015 

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  • 高密度実装のための差動線路屈曲部における非対称テーパ付密結合屈曲構造の収納性向上

    電子情報通信学会環境電磁工学研究会, EMCJ2015-39, pp.49-54  2015 

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  • 損失を有する共振器型フィルタの設計法の提案と検証

    第17回IEEE広島支部学生シンポジウム, A-26  2015 

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  • 単純電力解析対策を目的としたRSA暗号回路のサイドチャネル波形分析

    第17回IEEE広島支部学生シンポジウム, A-71  2015 

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  • サイドチャネル情報漏洩に寄与が大きいAES回路部の内部電流源に基づく検討

    第38回情報理論とその応用シンポジウム(SITA2015)予稿集, pp. 720-724  2015 

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  • 平衡度の異なる線路接続位置へのキャパシタ実装によるコモンモードからノーマルモードへのモード変換抑制

    第17回IEEE広島支部学生シンポジウム, B-26  2015 

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  • 永久磁石の静磁界を利用した光ポンピング原子磁気センサの交流磁界検出における測定条件の最適化

    第17回IEEE広島支部学生シンポジウム, B-30  2015 

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  • ミアンダ配線を有するフェライト膜付プレーナ型EBG構造を搭載した実機によるノイズ抑制評価

    第29回エレクトロニクス実装学会春季講演大会, 17C3-4, pp. 319-322  2015 

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  • 筋電義手からの放射量評価法の検討

    ギガビット研究会筋電義手分科会第4回研究会  2015 

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  • 電源-グラウンド層間のノイズ低減のためのビアレス・オープンスタブ型EBG構造の提案

    電子情報通信学会環境電磁工学研究会, EMCJ2014-95, pp.57-62  2015 

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  • 差動線路の信号品質に与えるコモンモード特性インピーダンスの影響評価

    電子情報通信学会総合大会, B-4-63  2015 

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  • AES暗号回路における致命的なクロックグリッチ注入タイミングの測定

    第6回ホットチャネルワークショップ  2015 

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  • 電力変換回路の伝導妨害波予測を目的とした線形等価回路モデルの検討―スイッチング周波数変動影響の考察―

    電子情報通信学会環境電磁工学研究会, EMCJ2015-5, pp.19-24  2015 

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  • 差分フォルト解析においてクリティカルなグリッチ注入タイミングの測定

    2015年 暗号と情報セキュリティシンポジウム(SCIS2015), 3A3-3  2015 

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  • オンボードRLスナバの実装位置によるPDN共振抑制効果の検証

    平成26年度(第65回)電気・情報関連学会中国支部連合大会, p.351  2014 

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  • モデル定数の合理性向上を目的としたIH調理器の伝導妨害波予測モデル同定実験の改良

    第16回IEEE広島支部学生シンポジウム, B-14  2014 

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  • グラウンド面からの高さを変えた場合の差動線路の屈曲部におけるモード変換量のモード等価回路による評価

    平成26年度(第65回)電気・情報関連学会中国支部連合大会, p.351  2014 

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  • 電子機器への妨害波注入における電源ケーブルのコモンモード電圧とICコア電圧に発生するノイズとの関係

    平成26年度(第65回)電気・情報関連学会中国支部連合大会, p.115  2014 

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  • 内部等価電流源に基づくAES 暗号回路の情報漏洩源としての挙動分析

    電子情報通信学会環境電磁工学研究会, EMCJ2014-26, pp.13-18  2014 

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  • 内部等価電流源に基づく相関電力解析におけるAES暗号回路の情報漏洩源分析

    第16回IEEE広島支部学生シンポジウム, A-14  2014 

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  • ディジタルICのPDN共振を抑制するオンボードRLスナバの実装位置自由度の検討

    電子情報通信学会環境電磁工学研究会, EMCJ2014-81, pp.69-74  2014 

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  • 差動線路の屈曲部におけるモード変換抑制のための非対称テーパ付密結合屈曲構造の提案

    電子情報通信学会環境電磁工学研究会, EMCJ2013-116, pp.27-32  2014 

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  • フェライト膜付プレーナEBG構造の実用化のための検討

    第28回エレクトロニクス実装学会春季講演大会, 5A-12, pp.43-46  2014 

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  • 電源線から侵入した外乱に起因するクロックグリッチによるFPGA誤動作事例

    第28回エレクトロニクス実装学会春季講演大会, 5A-19, pp.63-66  2014 

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  • フェライト膜付プレーナEBG構造のミアンダ配線を用いた小型化

    エレクトロニクス実装学会 超高速・高周波エレクトロニクス実装研究会 平成25年度第4回公開研究会, pp. 1-4  2014 

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  • 暗号ICの安全評価用標準プリント基板の開発

    第18回岡山リサーチパーク研究・展示発表会  2014 

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  • 故障利用攻撃を目的とした電源線からAES回路へのパルス注入実験

    第31回 暗号と情報セキュリティシンポジウム(SCIS2014), 3A1-3  2014 

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  • AES回路の等価電流源に基づくハミング距離漏えいモデルの検討

    第31回 暗号と情報セキュリティシンポジウム(SCIS2014), 3A2-2  2014 

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  • 電源ケーブルからICへ侵入する外来妨害波の注入方法による比較

    電子情報通信学会環境電磁工学研究会, EMCJ2014-22, pp.31-36  2014 

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  • フェライト薄膜とオープンスタブからなる損失を有する共振器型フィルタの作製と評価

    電子情報通信学会環境電磁工学研究会, EMCJ2014-27, pp.7-12  2014 

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  • 電源ケーブルへのバーストパルス注入による故障発生の検討

    第5回ホットチャネルワークショップ  2014 

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  • 暗号機器のサイドチャネル攻撃に対する安全設計に関する研究開発

    ICTイノベーションフォーラム2014  2014 

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  • モード変換抑制のための電源系配線へのコンデンサ実装位置の検討

    電子情報通信学会環境電磁工学研究会, EMCJ2014-32, pp.5-10  2014 

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  • 差動線路屈曲部における非対称テーパ付密結合屈曲構造の作製とモード変換抑制の評価

    電子情報通信学会2014年ソサイエティ大会, B-4-42, p. 269  2014 

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  • 電磁バンドギャップ(EBG)の原理とノイズ伝搬抑制への応用

    2014エレクトロニクス実装学会最先端実装技術シンポジウム  2014 

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  • 線路の平衡度から⾒たノイズ発⽣と対策

    第56回STARCアドバンストセミナー(ノイズEMC対策技術(1))  2014 

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  • 回路基板の多線条配線における諸問題の評価と展開

    ギガビット研究会 筋電義手分科会第3回研究会  2014 

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  • ノーマル・コモン両モード間のモード変換を考慮したコモンモードアンテナモデルによる不要電磁放射シミュレーション

    電子情報通信学会エレクトロニクスシミュレーション研究会, EST2014-6, pp.29-34  2014 

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  • 高速差動線路の屈曲部におけるモード変換に平衡度が及ぼす影響の評価

    平成25年度電気・情報関連学会中国支部第64回連合大会  2013 

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  • FPGAのオンボード電源電圧予測へのLECCSモデルの適用

    電子情報通信学会環境電磁工学研究会  2013 

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  • 等価回路モデルを用いたボードレベルでのサイドチャネル攻撃シミュレーション

    電子情報通信学会2013年ソサイエティ大会  2013 

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  • PCBの電源層へのEBG構造とフェライト膜の導入による無線通信品質改善

    平成25年度電気・情報関連学会中国支部第64回連合大会  2013 

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  • 平衡・不平衡線路の接続とEMC

    エーイーティー ユーザーグループミーティング CST UGM 2013  2013 

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  • EBG構造の原理とその応用

    第二回トッパンNECサーキットソリューションズ プライベートセミナー  2013 

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  • 暗号ICで発生するサイドチャネル解析におけるノイズの等価電流源モデルに基づく一検討 ~SASEBO-Gを用いた検討~

    電子情報通信学会環境電磁工学研究会  2013 

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  • オープンスタブと磁性膜から構成される損失を有する共振器型フィルタを用いた平行平板共振抑制

    電子情報通信学会環境電磁工学研究会  2013 

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  • 電源供給回路に挿入するオンボードRLスナバ設計法

    電子情報通信学会環境電磁工学研究会  2013 

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  • 平衡度の異なる線路の接続とモード変換

    エレクトロニクス実装学会システムJisso-CAD/CAE研究会 平成25年度第1回公開研究会  2013 

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  • 回路基板の多線条配線における諸問題の評価と展開

    ギガビット研究会 第4回シンポジウム  2013 

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  • 損失を有する1/4波長共振器による電源/グラウンド層間共振抑制

    第27回エレクトロニクス実装学会春季講演大会  2013 

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  • 差動線路の屈曲部のモード等価回路表現

    電子情報通信学会環境電磁工学研究会  2013 

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  • 線路の平衡度から見た差動線路の屈曲部で発生するモード変換の評価

    エレクトロニクス実装学会システムJisso-CAD/CAE研究会 平成25年度第2回公開研究会  2013 

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  • AESへの相関電力解析に対するSubBytes高速化効果の評価

    第15回IEEE広島支部学生シンポジウム  2013 

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  • 2本の伝送線路のSパラメータ測定に基づく同軸コネクタ部のF行列同定

    第15回IEEE広島支部学生シンポジウム  2013 

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  • ガードトレースへの周期構造導入によるコモンモード放射抑制と信号品質維持の両立

    電子情報通信学会環境電磁工学研究会  2013 

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  • コモンモードおよびノーマルモードのアンテナモデルを用いた全EMI放射の定量予測

    電子情報通信学会環境電磁工学研究会  2013 

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  • サイドチャネル攻撃予測のための暗号FPGAの等価電流源同定

    電子情報通信学会2013年総合大会  2013 

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  • プリント基板レベルでの相関電力解析に対する安全性予測

    2013年暗号と情報セキュリティシンポジウム  2013 

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  • 平衡・不平衡線路におけるグラウンドとEMC

    第27回エレクトロニクス実装学会春季講演大会  2013 

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  • EMCマクロモデルの暗号機器へのサイドチャネル攻撃に対する安全性予測への適用

    第27回エレクトロニクス実装学会春季講演大会  2013 

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  • 線路の平衡度および電圧反射係数とモード変換の関係の一考察

    電子情報通信学会2013年総合大会  2013 

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  • 平行平板共振抑制のためのEBG構造とフェライト膜を組み合わせた電源層の評価

    第27回エレクトロニクス実装学会春季講演大会  2013 

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  • PCB上の非対称配線に起因するEMI/SI問題の検討

    ギガビット研究会 第3回シンポジウム  2012 

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  • Experimental Model Validation of Mode-convesion Sources Introduced to Modal Equivalent Circuit

    2012 IEEE International Symposium on Electromagnetic Compatibility  2012 

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  • 回路基板の多線条配線における諸問題の評価と展開

    ギガビット研究会 第2回シンポジウム  2012 

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  • STPケーブルの接地法とモード変換量の関係について平衡度を考慮した評価

    環境電磁工学研究会  2012 

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  • LECCSモデルを用いた暗号処理回路の等価電流源同定

    2012年電子情報通信学会総合大会  2012 

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  • ノイズ対策のためのモード等価回路を用いた回路シミュレーション

    2012年電子情報通信学会総合大会  2012 

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  • 電力変換回路の線形等価回路モデル構築を目的とした2 ポートLISN の作製

    2012年電子情報通信学会総合大会  2012 

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  • 電力変換回路の伝導妨害波電圧低減設計を目的とした線形等価回路モデル構築

    2012年電子情報通信学会総合大会  2012 

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  • Insertion of Parallel RL Circuits into Power Distribution Network for Simultaneous Switching Current Reduction and Power Integrity

    2012 Asia-Pacific International Symposium on Electromagnetic Compatibility in Singapore (APEMC 2012)  2012 

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  • 電力変換回路の伝導妨害波予測を目的とした線形等価回路モデルの検討~デュアルポートLISNを用いたモデル構築~

    環境電磁工学研究会  2012 

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  • ICのEMCおよびPI向上を目的としたRLダンパ回路の提案

    環境電磁工学研究会  2012 

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  • Modal Equivalent Circuit with Mode-Conversion Sources for Investigating Cable Interconnection with Different Imbalance Factors

    2012 Korea-Japan EMT/EMC/BE Joint Conference (KJJC-2012)  2012 

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  • モード等価回路を用いた多線条配線のコモンモード解析

    システムJisso-CAD/CAE研究会  2012 

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  • Lossy Resonators for Suppressing Power-bus Resonance of Printed Circuit Board

    5th Pan-Pacific EMC Joint Meeting (PPEMC'12), pp.65-68, Tokyo, Japan  2012 

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  • 平衡ケーブルと不平衡負荷の接続により生じる平衡度不整合がモード変換に及ぼす影響のモード等価回路を用いた評価

    第14回IEEE広島支部学生シンポジウム  2012 

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  • 損失をもつ1/4波長共振器を用いた平行平板共振抑制

    2012電子情報通信学会ソサイエティ大会  2012 

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  • コモンモード放射抑制のためのガードトレースに周期構造を導入した効果の実測による評価

    平成24年度電気・情報関連学会中国支部第63回連合大会  2012 

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  • Equivalent Current Source of Side-channel Signal for Countermeasure Design with Analog Circuit Simulator

    2012 IEEE International Symposium on Electromagnetic Compatibility  2012 

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  • Identification of Equivalent Current Source of Cryptographic Circuit Based on Impedance and Current Measurements at Board Level

    International Conference on Instrumentation, Control and Information Technology (SICE Annual Conference 2012)  2012 

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  • 間引き処理によるAES暗号の第10ラウンド鍵解読の高速化

    第14回IEEE広島支部学生シンポジウム  2012 

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  • 多導体線路系のモード等価回路構築の簡単化を目的としたネットリスト自動生成プログラムの作成

    第14回IEEE広島支部学生シンポジウム  2012 

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  • 線路間の平衡度不整合に起因するモード変換の回路表現に対する電磁界シミュレーションを用いた初期検討

    エレクトロニクスシミュレーション研究会  2012 

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  • 金属板近傍に配置された信号線からの放射電界を予測するための簡易等価モデルの提案

    第14回IEEE広島支部学生シンポジウム  2012 

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  • 電源供給回路共振への臨界減衰適用によるIC/LSIのEMC性能改善

    第26回エレクトロニクス実装学会春季講演大会  2012 

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  • サイドチャネル攻撃に対するプリント基板上での対策技術としてのデカップリング効果のシミュレーション

    2012年暗号と情報セキュリティシンポジウム  2012 

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  • モード分解法に基づくモード等価回路を用いた信号伝送系の回路解析

    第26回エレクトロニクス実装学会春季講演大会  2012 

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  • 伝送線路の埋込みによるICパッケージのインダクタンス測定

    エレクトロニクスシミュレーション研究会  2012 

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  • EMCマクロモデルを用いた暗号機器へのサイドチャネル攻撃に対する安全性の予測

    環境電磁工学研究会  2012 

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  • ケーブル接続された送受信機器のコモンモードモデルと同定(その3)

    環境電磁工学研究会  2011 

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  • オープンスタブ型EBG 構造における2 本のスタブを用いた阻止域の制御

    2011年電子情報通信学会総合大会  2011 

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  • 電源系デカップリングによる暗号用 FPGA のサイドチャネル攻撃耐性向上

    環境電磁工学研究会  2011 

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  • 電源系配線のオンボードデカップリング による暗号処理基板のサイドチャンネル 攻撃耐性向上

    2011年電子情報通信学会総合大会  2011 

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  • Mode-equivalent Modelling of System Consisting of Transmission Lines with Different Imbalance Factors

    2011 Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC2011)  2011 

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  • 電力変換回路の線形等価回路モデル構築を目的とした2ポートLISNの作製

    電気・情報関連学会中国支部第62回連合大会  2011 

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  • 寄生インピーダンスの共振に起因するIC電源系高周波電流ピークのダンピング抵抗挿入による低減

    環境電磁工学研究会  2011 

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  • PCBとその周辺のEMC およびSI/PI

    ギガビット研究会第1回シンポジウム  2011 

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  • 電力変換回路の伝導妨害波低減設計のための線形等価回路モデル構築

    電気・情報関連学会中国支部第62回連合大会  2011 

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  • EBG構造とフェライト膜を用いた電源層の不要電磁波伝搬抑制と電源品質の評価

    環境電磁工学研究会  2011 

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  • ケーブル接続された送受信機器のモード等価回路と同定(その2)

    環境電磁工学研究会  2011 

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  • On-Board Decoupling of Cryptographic FPGA to Improve Tolerance to Side-Channel Attacks

    Cryptographic FPGA to Improve Tolerance to Side-Channel Attacks 2011 IEEE International Symposium on Electromagnetic Compatibility  2011 

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  • 差動伝送線路を対象とした平衡度不整合モデルによるコモンモード電流予測法の検証

    第21 回マイクロエレクトロニクスシンポ ジウム  2011 

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  • チップ部へのTHRUパターンの埋め込みによるICパッケージインピーダンスの測定

    環境電磁工学研究会  2011 

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  • 2本のスタブを用いたオープンスタブ型EBG構造による阻止域の制御と設計

    環境電磁工学研究会  2011 

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  • 電気光学プローブを用いた電界・磁界測定の検討

    第13回IEEE広島支部学生シンポジウム  2011 

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  • モード変換励振源を有するモード等価回路の有効性の実験的検証

    第13回IEEE広島支部学生シンポジウム  2011 

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  • プリント回路基板と筺体の金属ネジ接続により発生する不要電磁波放射の抑制に関する研究

    第13回IEEE広島支部学生シンポジウム  2011 

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  • Power/Ground Layers with EBG Structure and Ferrite Film for Noise Suppression and Power Integrity Improvement

    2011 IEEE Electrical Design of Advanced Packaging & Systems (EDAPS)  2011 

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  • フェライトめっき膜を内蔵するEBG構造の帯域阻止特性

    電気学会マグネティックス研究会  2011 

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  • Increase of RF Power Current Due to Coupling between Power Distribution and IO Networks

    2010 Asia-Pacific Radio Science Conference (AP-RASC'10)  2010 

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  • LECCSモデルにおける寄生結合の評価とIBISモデルとの組み合わせによるPI/SI解析

    2010年ソサイエティ大会  2010 

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  • Fast and Optimal Placement of Decoupling-capacitors for Suppressing Radiated Emissions from Power-bus of Printed Circuit Boards

    2010 Asia-Pacific Radio Science Conference (AP-RASC'10)  2010 

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  • プリント回路基板上に構成するフィルタ設計を目的とした伝送線路モデルを用いた等価回路モデルの構築

    環境電磁工学研究会  2010 

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  • EMIフィルタ設計への適用を目的とした電子レンジ内蔵インバータの線形等価回路モデル構築

    環境電磁工学研究会  2010 

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  • 電源系パターンの寄生容量を考慮したデカップリングインダクタの配置

    環境電磁工学研究会  2010 

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  • ケーブル接続された送受信機器のコモンモードモデルと同定

    環境電磁工学研究会  2010 

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  • Physics-Based Modeling of DGS Filter Formed on Return Plane of Printed Circuit Boards

    4th Pan-Pacific EMC Joint Meeting (PPEMC'2010)  2010 

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  • CISPR16-1準拠LISN用ローパスフィルタで使用するコイルの設計

    第12回IEEE広島支部学生シンポジウム  2010 

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  • ケーブル接続された送受信機器のモード等価回路と同定

    環境電磁工学研究会  2010 

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  • IC/LSIに起因するEMIのI/O 端子終端条件の依存性に関する回路シミュレーションおよび実測による検証

    電気・情報関連学会中国支部第61回連合大会  2010 

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  • 平衡度不整合理論に基づくコモンモード等価アンテナの入力インピーダンスに注目したプリント回路基板からの放射量計算

    第12回IEEE広島支部学生シンポジウム  2010 

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  • EBG構造と磁性膜の組み合わせによる平行平板共振抑制における磁性膜の電気的特性依存性

    第12回IEEE広島支部学生シンポジウム  2010 

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  • ガードトレースへの周期構造導入による信号伝達特性の改善

    電気・情報関連学会中国支部第61回連合大会  2010 

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  • サイトVSWR法における測定の不確かさについて周波数ステップの与える影響の評価

    電子情報通信学会 環境電磁工学研究会, EMCJ2009-1, pp.1-6  2009 

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  • EBG構造を形成した電源/グランド層へのノイズ抑制シート適用による不要電磁波伝搬抑制効果の評価

    電子情報通信学会 環境電磁工学研究会, EMCJ2009-2, pp.7-12  2009 

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  • プリント回路基板の帰路面パターンで構成する帯域遮断フィルタ設計のための等価回路モデルの提案

    2009年ソサイエティ大会  2009 

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  • De-embedding of Board Parasitics with T-parameters for S-parameter Measurements of Integrated Circuits on PCB (Examinations in One-port Measurements)

    The Fifth Asia-Pacific Conference on Environmental Electromagnetics (CEEM'2009)  2009 

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  • ボード実装したICのSパラメータ測定を目的としたTパラメータによる引出し線のディエンベディング(1ポート測定における検討)

    環境電磁工学研究会  2009 

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  • 二つの電流源をもつEMCマクロモデルLECCS-I/OによるCMOSインバータICの電源および出力電流シミュレーション

    環境電磁工学研究会  2009 

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  • コモンモードアンテナモデルを実基板に適用するための検討 -アンテナエレメントの取り扱いについて-

    2009年電子情報通信学会総合大会, B-4-55, p.398  2009 

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  • 差動伝送線路におけるコモンモード抑制のための平衡度制御

    2009年電子情報通信学会総合大会, B-4-60, p.403  2009 

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  • 両端のみでビア接続を行うガードトレースによるコモンモード放射低減法

    第23回エレクトロニクス実装学会学術講演大会, 12B-3, pp.  2009 

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  • 単一のスリットセグメントへの領域分割によるプリント回路基板の電源系共振の高速解析

    電子情報通信学会 環境電磁工学研究会, EMCJ2008-118, pp.25-30  2009 

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  • EMC設計を支援する高速EMI シミュレータの開発とその応用

    2009年電子情報通信学会総合大会, CP-2-3, pp.SS-4-SS-5  2009 

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  • 音声ガイドシステムのための白色LEDを用いた可視光通信送受信機の作製

    第11回IEEE広島支部学生シンポジウム  2009 

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  • xyzステージを用いた磁界プローブによる電流測定系の構築および任意周波数ステップ測定を目的としたプローブ較正係数の補間

    第11回IEEE広島支部学生シンポジウム  2009 

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  • EMI/PI性能向上を目的としたICマクロモデルLECCSのバイパス回路設計への適用

    環境電磁工学研究会  2009 

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  • プリント回路基板を筐体にネジ接続した場合において金属ネジの位置と筐体の大きさが不要電磁波放射に与える影響

    第11回IEEE広島支部学生シンポジウム  2009 

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  • Estimation of Radiated Emissions from Multilayered Printed Circuit Board by Common-mode Antenna Model

    The Fifth Asia-Pacific Conference on Environmental Electromagnetics (CEEM'2009)  2009 

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  • ケーブル接続された送受信機器間に流れるコモンモード電流 ―平衡度不整合理論に基づいた算出―

    電気・情報関連学会中国支部第60回連合大会  2009 

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  • 電源-グランド間インピーダンス付加による非理想電源下でのIBISモデルの精度向上

    第23回エレクトロニクス実装学会学術講演大会, 11A-7, pp.13-14  2009 

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  • コモンモード放射低減のための抵抗付加によるガードトレース共振抑制

    IEEE広島支部学生シンポジウム (HISS), B-18, pp.236-239  2008 

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  • CMOSインバータの2電流源EMCマクロモデル構築

    2008年電子情報通信学会総合大会, B-4-25, p.334  2008 

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  • PCBの電源層間への高透磁率シート挿入による層間共振と放射の抑制

    2008年電子情報通信学会総合大会, B-4-30, p.339  2008 

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  • EMIシミュレーションのためのドライバ回路のマクロモデル

    第22回エレクトロニクス実装学会学術講演大会, 18A-2, pp.69-70  2008 

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  • 多電源LSIのEMCマクロモデルLECCSの電流源位相が伝導ノイズシミュレーションに与える影響

    第22回エレクトロニクス実装学会学術講演大会, 18A-13. pp. 91-92  2008 

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  • コモンモード放射低減のための平衡度不整合理論に基づくガードトレース接地法

    第22回エレクトロニクス実装学会学術講演大会, 17A-9, pp.17-18  2008 

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  • プリント回路基板上の差動伝送系におけるEBG構造を用いたコモンモード抑制効果の検証

    IEEE広島支部学生シンポジウム (HISS), B-20, pp.264-267  2008 

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  • 1GHzを超える電波暗室評価に用いられるサイトVSWR法の有効性の検証

    IEEE広島支部学生シンポジウム, B-27, pp.60-63  2008 

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  • 伝送線路の電力伝搬モデルを用いた帰路面にスリットを有するプリント回路基板の信号品質解析

    IEEE広島支部学生シンポジウム (HISS), B-24, pp.27-30  2008 

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  • I/O ゲートを介した給電系回路とI/O 系回路との接続を考慮したマイクロコントローラH8/3694F のEMCマクロモデル構築

    IEEE広島支部学生シンポジウム (HISS), B-26, pp.299-302  2008 

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  • A Model of Signal Propagation along a Microstrip Line Crossing over a Slit in Ground Plane for Waveform Simulation

    3rd Pan-Pacific EMC Joint Meeting (PPEMC'08), pp.91-92  2008 

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  • コモンモードアンテナモデルによるコネクタ接続されたプリント回路基板からの放射電磁波予測(その2)〜インダクタンスの考慮によるコネクタ部モデルの改良 〜

    電子情報通信学会 環境電磁工学研究会, EMCJ2008-32, pp.37-42  2008 

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  • 平衡度不整合理論で定義されるコモンモード励振源の実験的検証

    2008年電子情報通信学会総合大会, B-4-37, p.346  2008 

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  • Common-Mode Radiation of Combined Boards deduced from the Common-Mode Antenna Model

    3rd Pan-Pacific EMC Joint Meeting (PPEMC'08), pp.7-8  2008 

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  • 配線パターンを変化させた基板による多電源ピンLECCS-coreモデルの評価

    電子情報通信学会 環境電磁工学研究会, EMCJ2008-33, pp.43-48  2008 

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  • PCBの電源/グラウンドプレーンに形成したEBG構造に高透磁率材料を用いた単位セルの小型化と阻止域の拡大

    2007年電子情報通信学会総合大会, B-4-42, p.366  2007 

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  • 近接グラウンドに着目したケーブルの断面形状と励起コモンモード電流

    環境電磁工学研究会  2007 

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  • 近接グラウンドに着目したケーブルの断面形状と励起コモンモード電流

    環境電磁工学研究会  2007 

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  • 寄生インピーダンスのEMCマクロモデルLECCS-coreに対する影響

    第21回エレクトロニクス実装学会講演大会, 15B-02, pp. 117-118  2007 

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  • LECCSモデルの広帯域化を目的とした寄生容量表現法の検討

    電子情報通信学会 環境電磁工学研究会 EMCJ2007-33, pp.5-10  2007 

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  • SPICEに基づくCMOSインバータのEMCマクロモデルの構築

    平成19年度電気・情報関連学会中国支部第58回連合大会, 13-5, p.91  2007 

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  • コモンモードアンテナモデルによるコネクタ接続されたプリント回路基板からの放射電磁波予測

    電子情報通信学会 環境電磁工学研究会 EMCJ2007-9, pp.49-54  2007 

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  • コモンモードアンテナモデルを用いたプリント回路基板からの放射予測-励振源の重ね合わせに関する検討-

    電子情報通信学会 環境電磁工学研究会 EMCJ2007-25, pp.39-44  2007 

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  • コネクタ接続プリント回路基板を用いたコモンモードアンテナモデルの評価

    第9回IEEE広島支部学生シンポジウム(HISS), B-14  2007 

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  • コモンモード放射低減のためのガードトレース接地ビア位置の検討

    第9回IEEE広島支部学生シンポジウム(HISS), B-15  2007 

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  • 直角に曲がったマイクロストリップ線路を有するプリント回路基板におけるコモンモードアンテナモデルを用いた放射予測

    平成18年度電気・情報関連学会中国支部第57回連合大会, 16-1, p.549  2006 

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  • マイクロストリップ線路の帰路面にあるスリットによって発生する複数モードの伝搬電力計算

    平成18年度電気・情報関連学会中国支部第57回連合大会, 16-1, p.550  2006 

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  • バイスタティックライダによる水雲粒子径測定原理の検証

    平成18年度電気・情報関連学会中国支部第57回連合大会, 16-1, p.17  2006 

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  • 不平衡度変化に基づくコモンモードアンテナモデルを用いたコネクタ結合プリント回路基板からのコモンモード放射量予測

    平成18年度電気・情報関連学会中国支部第57回連合大会, 16-1, p.548  2006 

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  • EBG構造をもつ電源/グランドプレーンの高透磁率材料による小型化

    第8回IEEE広島支部学生シンポジウム(HISS), A-48, pp.  2006 

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  • パッチアンテナ設計ツール開発を目的とした対向スリットを有する平行2層板の共振特性解析

    第8回IEEE広島支部学生シンポジウム(HISS), A-2, pp.  2006 

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  • 高速EMIシミュレータの開発を目的としたプリント回路基板からの放射計算

    第8回IEEE広島支部学生シンポジウム(HISS), A-3, pp.  2006 

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  • Translation of the Electromagnetic Mode-Splitting along a Microstrip Line with a Slit in the Ground Plane

    The Fourth Asia-Pacific Conference on Environmental Electromagnetics (CEEM'2006) K-3, pp.15-18  2006 

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  • Analysis and Design of Electromagnetic Bandgap (EBG) Structures for Power Plane Isolation Using 2D Dispersion Diagrams and Scalability

    10th IEEE Workshop on Signal Propagation on Interconnects  2006 

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  • Finite Difference Modeling of Multiple Planes in Packages

    17th International Zurich Symposium on Electromagnetic Compatibility (EMC-Zurich in SINGAPORE 2006), F3-PCB-3-1, pp.549-552  2006 

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  • Size Reduction of Electromagnetic Bandgap (EBG) Structures Using a Novel Unit Cell

    2006年電子情報通信学会総合大会, B-4-29, p.324  2006 

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  • LSI電源系インピーダンスにおける内部回路動作状態依存性の実験的検証

    平成18年度電気・情報関連学会中国支部第57回連合大会, 16-1, p.1  2006 

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  • 多電源LECCS-coreモデルの等価内部電流源間位相差がモデル精度に与える影響の検証

    平成18年度電気・情報関連学会中国支部第57回連合大会, 16-1, p.2  2006 

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  • Simplification of CMOS Inverter Macro-Models for Power Integrity and EMC Simulation

    2006 Korea-Japan Joint Conference (KJJC2006)  2006 

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  • Size Reduction of Electromagnetic Bandgap (EBG) Structures with New Geometries and Materials

    The 56th Electronic Components and Technology Conference (ECTC), Session 37-26, pp.1784-1789  2006 

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  • LECCS-I/Oモデルの広帯域化を目的とした3ポートSパラメータ測定によるインピーダンスパラメータ抽出法の検討

    電子情報通信学会 環境電磁工学研究会 EMCJ2006-21, pp.17-22  2006 

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  • Electromagnetic Modes Excited by a Signal Transmission Line Overpassing a Slit of Return Plane

    2nd Pan-Pacific EMC Joint Meeting (PPEMC'06), 26-S6-4  2006 

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  • A Novel Synthesis Method for Designing Electromagnetic Band Gap (EBG) Structures in Packaged Mixed Signal Systems

    The 56th Electronic Components and Technology Conference (ECTC), Session 37-26, pp.1645-1651  2006 

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  • EMI Antenna Model Based on Common-Mode Potential Distribution for Fast Prediction of Radiated Emission

    2006 IEEE International Symposium on Electromagnetic Compatibility (EMC2006), WE-AM-2-2, pp.280-284  2006 

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  • Stopband Prediction with Dispersion Diagram for Electromagnetic Bandgap Structures in Printed Circuit Boards

    2006 IEEE International Symposium on Electromagnetic Compatibility (EMC2006), TH-PM-3-6, pp.807-811  2006 

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  • Excitation of Electromagnetic Modes by a Signal Transmission Line Overpassing a Slit of Return Plane

    Progress In Electromagnetics Research Symposium 2006 (PIERS 2006-Tokyo), Session 1P3  2006 

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  • 西日本4地点で取得したライダプロファイルの比較にもとづく黄砂輸送経路の推定

    第24回レーザセンシングシンポジウム, A-4, pp.15-18  2005 

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  • Sパラメータ測定によるLECCS-I/Oモデルのインピーダンスパラメータ抽出法

    電子情報通信学会 環境電磁工学研究会 EMCJ2004-160, pp.79-84  2005 

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  • An inverted rib waveguide with both close coupling and strong confinement for optoelectronic integration and optical interconnection - Numerical results -

    電子情報通信学会 光エレクトロニクス研究会 OPE2004-184, pp.7-12  2005 

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  • 2重リング型光共振器を用いた可変分散補償器の特性解析

    電子情報通信学会 光エレクトロニクス研究会 OPE2004-185, pp.13-16  2005 

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  • Efficient Calculation of Power/Ground Plane Resonance in Multilayer PCBs with EMI Simulator HISES

    2005 Pan-Pacific EMC Joint Meeting, Hyogo, Japan, May 27  2005 

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  • 高速差動伝送系の受信端における平衡度整合の検討

    電子情報通信学会 環境電磁工学研究会 EMCJ2005-54, pp.7-12  2005 

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  • Sパラメータ測定による多電源ピンLSIのLECCS-coreモデルの構築

    電子情報通信学会 環境電磁工学研究会 EMCJ2004-161, pp.85-90  2005 

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  • Modeling and Simulation of Via-Connected Power Bus Stacks in Multilayer PCBs

    第十五届全国電磁兼容学術会議, pp.8-13  2005 

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  • ライダで測定した黄砂層における偏光解消度の粒径および体積密度に対する依存性の検証

    平成17年度電気・情報関連学会中国支部第56回連合大会, 16-11, pp.161-162  2005 

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  • 多層プリント回路基板の共振解析 -高速EMIシミュレータ:HISES-

    2005 Microwave Workshops and Exhibition (MWE 2005), ワークショップ3「電磁界シミュレータと回路設計」WS03-03  2005 

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  • Virtual Port Parameters in Segmentation Method for Modeling Power Bus Structures in Multilayer PCBs

    10th International Symposium on Microwave and Optical Technology (ISMOT-2005), B-19, pp.323-326  2005 

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  • Control of Unintentional Electromagnetic Waves from Digital Circuits: Efficient EMC Modeling of Devices and PCBs

    2004 International Symposium on Electromagnetic Compatibility (EMC'04/Sendai), 1D1-8, Vol.1, pp.197-200  2004 

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  • 情報系学科の電気電子基礎実験において一斉実験と個別指導を両立させるための試み

    平成16年度電気・情報関連学会中国支部第55回連合大会, 202705, pp.555-556  2004 

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  • 光ファイバインタコネクションにおけるSNOMによるSWR測定

    電子情報通信学会 光エレクトロニクス研究会 OPE2004-151, pp.23-26  2004 

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  • 逆リブ型ポリイミド光導波路におけるモードプロファイル制御

    平成16年度電気・情報関連学会中国支部第55回連合大会, 011206, p.7  2004 

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  • A Minimum Dead Space Algorithm for Wavelength Reuse Problems in WDM Ring Networks

    3rd International Conference on Optical Communications and Networks (ICOCN 2004),pp.371-374  2004 

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  • 逆リブ型ポリイミド光導波路の作製と導波実験

    第6回IEEE広島支部学生シンポジウム,B-23,pp.90-93  2004 

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  • EMCマクロモデルLECCS-I/Oによる多ビット出力ICの給電電流シミュレーション

    エレクトロニクス実装学会 システム実装CAE研究会/超高速高周波エレクトロニクス実装研究会 合同公開研究会,pp.11-16  2004 

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  • Ring resonator with multipath structure for FSR extension as add/drop multiplexer

    3rd International Conference on Optical Communications and Networks (ICOCN 2004),pp.189-192  2004 

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  • 偏光解消度の統計量から黄砂を判定する試み

    第23回レーザセンシングシンポジウム, BP-2, pp.125-126  2004 

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  • 大気分子モデルを利用したインバージョン境界値の推定

    第23回レーザセンシングシンポジウム, BP-3, pp.127-130  2004 

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  • 平衡度不整合モデルを用いたガードトレースのEMI低減効果の予測

    電子情報通信学会 環境電磁工学研究会 EMCJ2004-46, pp.53-58  2004 

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  • 多層プリント回路基板における電源-グランド層共振特性の高速計算

    電子情報通信学会 第4回マイクロ波シミュレータ研究会,MST2004-05,pp.29-36  2004 

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  • 準差動伝送の多ビット伝送系への適用

    第18回エレクトロニクス実装学術講演大会,19C-12,pp.229-230  2004 

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  • ディジタルICのEMCマクロモデル(LECCS-I/O)の分布定数負荷への拡張

    第18回エレクトロニクス実装学術講演大会,19C-16,pp.237-238  2004 

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  • Reduction of EMI from High-speed Transmission Line with Narrow Return Trace Using Quasi-differential Signaling

    2004 International Symposium on Electromagnetic Compatibility (EMC'04/Sendai), 2A1-2, pp.225-228  2004 

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  • Using Cavity-modes for Modeling of Via-connected Power Bus Stacks in Multilayer PCBs

    2004 International Symposium on Electromagnetic Compatibility (EMC'04/Sendai), 2A2-1, pp.237-240  2004 

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  • EMCマクロモデル(LECCS-I/O)の多ビット給電電流モデル

    第18回エレクトロニクス実装学術講演大会,19C-17,pp.239-240  2004 

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  • Quasi-Differential Signaling System for Low EMI

    2003 ICEP (International Conference on Electronics Packaging), TB4-3, pp.288-293  2003 

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  • Power Current Modeling of Load Dependency for EMI Simulation

    2003 ICEP (International Conference on Electronics Packaging), TB4-4, pp.294-298  2003 

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  • 多層プリント回路板のスリットを持つ電源-グラウンド層の共振特性解析

    第17回エレクトロニクス実装学術講演大会,12C-03,pp.77-78  2003 

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  • 狭いグランド幅をもつ回路基板にケーブルを付加した場合の電流配分率モデルによるコモンモード放射の予測

    電子情報通信学会 環境電磁工学研究会(EMCJ)  2003 

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  • Power Current Modeling of IC/LSI with Load Dependency for EMI Simulation

    2003 IEEE Symposium on Electromagnetic Compatibility, TU-AM-SS1-4, Vol.1, pp.16-21  2003 

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  • 反復処理による消散係数対後方散乱係数比の最適化

    第22回レーザセンシングシンポジウム  2003 

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  • セグメンテイション法による矩形と三角形要素からなる多層プリント回路基板の電源-グランド層共振特性解析

    電子情報通信学会 環境電磁工学研究会(EMCJ)  2003 

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  • Power bus resonance characteristics in multilayer printed circuit boards with slits

    EMC Symposium Zurich '03, 5A5, pp.23-28  2003 

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  • 電源島構造を有する多層基板のパスコン配置によるEMI低減効果

    電子情報通信学会 環境電磁工学研究会(EMCJ)  2003 

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  • ディジタルICのEMCモデル(LECCS-I/O)の多ビット出力ICへの拡張

    電子情報通信学会 環境電磁工学研究会(EMCJ)  2003 

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  • WDM用合分波器としての2重リング型光共振器の設計

    平成15年度電気・情報関連学会中国支部第54回連合大会  2003 

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  • Analysis of Resonance Characteristics of a Power Bus with Rectangle and Triangle Elements in Multilayer PCBs

    The 3rd Asia-Pacific Conference on Environmental Electromagnetics (CEEM2003), 136  2003 

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  • 複雑な伝搬経路を持つ導波路型2重リング光共振器の時間領域解析

    日本光学会年次学術講演会  2003 

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  • 多電源ピンLSIの線形等価回路モデルの構築

    第5回IEEE広島支部学生シンポジウム  2003 

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  • 黄砂の観測を目的としたインターネットシステム上のレーザレーダ運用

    第12回計測自動制御学会中国支部学術講演会  2003 

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  • LECCSモデルの多電源ピンLSIへの拡張

    電子情報通信学会 環境電磁工学研究会(EMCJ)  2003 

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  • 並列信号系に起因する不要電磁波放射抑制のためのパルスタイミング制御

    平成15年度電気・情報関連学会中国支部第54回連合大会  2003 

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  • High-Speed Common-Mode Prediction Method for PCBs Having a Signal Line Close to the Ground Edge

    2003 IEEE Symposium on Electromagnetic Compatibility, TU-AM-SS1-6, Vol.1, pp.28-33  2003 

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  • バイスタティックライダーによる水雲の粒径測定原理の検証

    平成15年度電気・情報関連学会中国支部第54回連合大会  2003 

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  • 異なる不平衡度を持つマイクロストリップ線路基板におけるコモンモードアンテナモデルの評価

    第5回IEEE広島支部学生シンポジウム  2003 

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