Presentations -
-
FPGA Trax Solver based on a Neural Network Design International conference
2015.12
-
並列処理指向・光再構成型ゲートアレイへのTMR実装
伊藤芳純, 渡邊 実
デザインガイア2015 -VLSI設計の新しい大地 2015.12
-
光再構成型ゲートアレイの反転コンフィギュレーション手法のフォールトトレランス評価
榛葉大樹, 渡邊 実
デザインガイア2015 -VLSI設計の新しい大地 2015.12
-
Radiation tolerance experiments of a laser array on an optically reconfigurable gate array International conference
2015.12
-
Optically Reconfigurable Gate Array Prototype System International conference
Masato Seo, Minoru Watanabe
The 1st RIS-MJIIT Workshop on Renewable and Sustainable Integrated Systems 2015 2015.12
-
Triple modular redundancy on parallel-operation-oriented optically reconfigurable gate arrays International conference
2015.12
-
Total-ionizing-dose tolerance analysis of an optically reconfigurable gate array VLSI International conference
2015.12
-
Sustainable advantage of a parallel configuration in an optical FPGA
2015.12
-
Total-Ionizing Dose Tolerance of the Serial Configuration on Cyclone II FPGA
2015.10
-
Effect of laser exposure condition on formation of holographic emmory by angle-multiplexing recording using liquid crystal composittes
2015.10
-
Fresnel Lens Radiation Shield for Photodiode International conference
2015.10
-
Triple Modular Redundancy on Parallel-Operation- Oriented FPGA Architectures for Optical Communications International conference
2015.10
-
100 Mrad Total-Ionizing Dose Tolerance Experiment of a Laser Array International conference
2015.10
-
Investigating the radiation tolerance of a laser array for an optically reconfigurable gate array International conference
2015.10
-
放射線でダメージを受けた光再構成型ゲートアレイのリカバリー手法
赤部知也, 渡邊 実
電子情報通信学会技術研究報告（リコンフィギャラブルシステム研究会) 2015.9.19
-
Formation of Holographic Memory by Angle-multiplexing Recording in Liquid Crystal Composites International conference
2015.8
-
光再構成型ゲートアレイの高速スクラビング
藤森卓巳, 渡邊 実
電子情報通信学会技術研究報告（リコンフィギャラブルシステム研究会） 2015.6.20
-
Holographic scrubbing technique for a programmable gate array International conference
2015.6
-
Radiation-hardened Optically Reconfigurable Gate Array Using a Negative Logic Configuration without Necessity of a Dedicated VLSI
2015.5
-
High-resolution configuration of optically reconfigurable gate arrays International conference
2015.5