Updated on 2025/04/22

写真a

 
WATANABE Nobuya
 
Organization
Faculty of Environmental, Life, Natural Science and Technology Assistant Professor
Position
Assistant Professor
External link

Degree

  • Doctor (Eingineering) ( 1999.9   Toyohashi University of Technology )

Research Interests

  • Programming Language System

  • Parallel Processing

  • Hardware Design System

  • Computer Architecture

  • Reconfigurable System

  • FPGA

  • ハードウェア設計自動化

  • 言語処理系

Research Areas

  • Informatics / Computer system  / Reconfigurable System

Education

  • Toyohashi University of Technology   大学院 工学研究科   電子・情報工学専攻

    1995.4 - 1998.5

      More details

  • Toyohashi University of Technology   大学院 工学研究科   情報工学専攻

    1993.4 - 1995.3

      More details

  • Toyohashi University of Technology   工学部   情報工学課程

    1991.4 - 1993.3

      More details

Research History

  • Okayama University   Faculty of Environment, Life, Natural Science and Technology   Assistant Professor

    2023.4

      More details

    Country:Japan

    researchmap

  • Okayama University   Academic Field of Natural Science and Technology, Academic Research Assembly   Assistant Professor

    2021.4 - 2023.3

      More details

    Country:Japan

    researchmap

  • Okayama University   大学院自然科学研究科 産業創成工学専攻   Assistant Professor

    2007.4 - 2021.3

      More details

  • Okayama University   大学院自然科学研究科 産業創成工学専攻   Research Assistant

    2005.4 - 2007.3

      More details

  • Okayama University   Faculty of Engineering   Research Assistant

    1998.6 - 2005.3

      More details

Professional Memberships

  • JAPAN SOCIETY FOR SOFTWARE SCIENCE AND TECHNOLOGY

      More details

  • THE INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATION ENGINEERS

      More details

  • INFORMATION PROCESSING SOCIETY OF JAPAN

      More details

  • 特定非営利活動法人パルテノン研究会

      More details

  • IEEE

      More details

Committee Memberships

  •   The International Conference on Field-Programmable Technology (FPT'22) FPGA Design Competition Local Support Member  

    2022.12   

      More details

    Committee type:Other

    researchmap

  •   第11回相磯秀夫杯FPGAデザインコンテスト(2022)実行委員会委員  

    2022.9   

      More details

    Committee type:Other

    researchmap

  • The International Conference on Field-Programmable Technology (FPT'21) FPGA Design Competition   Local Support Member  

    2021.12   

      More details

    Committee type:Academic society

    researchmap

  • 第10回相磯秀夫杯FPGAデザインコンテスト(2021)   委員  

    2021.10   

      More details

    Committee type:Academic society

    researchmap

  • The 21st Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2018)   Technical Program Committee, Logic Level Design Subcommittee  

    2017 - 2018   

      More details

    Committee type:Other

    researchmap

▼display all

 

Papers

  • Evaluation of a Wafer-Scale VLSI Using Programmable Architecture Reviewed

    Atsushi Takata, Minoru Watanabe, Nobuya Watanabe

    IEEE 43rd International Conference on Consumer Electronics (ICCE 2025)   2025.1

     More details

    Authorship:Last author   Language:English   Publishing type:Research paper (international conference proceedings)  

    researchmap

  • Radiation-Hardened Triple Modular Redundant Serial Communication System Using Triple Communication Lines Reviewed

    Utsuki Sekioka, Minoru Watanabe, Nobuya Watanabe

    IEEE 43rd International Conference on Consumer Electronics (ICCE 2025)   2025.1

     More details

    Authorship:Last author   Language:English   Publishing type:Research paper (international conference proceedings)  

    researchmap

  • Triple Modular Redundancy Logic Design from High-Level Hardware Description Reviewed

    Nobuya Watanabe, Minoru Watanabe

    IEEE 43rd International Conference on Consumer Electronics (ICCE 2025)   2025.1

     More details

    Authorship:Lead author, Corresponding author   Language:English   Publishing type:Research paper (international conference proceedings)  

    researchmap

  • Development of a Radiation-Hardened JTAG Interface for Optically Reconfigurable Gate Arrays Reviewed

    Naoki Nagamine, Minoru Watanabe, Nobuya Watanabe

    IEEE 43rd International Conference on Consumer Electronics (ICCE 2025)   2025.1

     More details

    Authorship:Last author   Language:English   Publishing type:Research paper (international conference proceedings)  

    researchmap

  • Radiation Degradation Evaluation of the Dynamic Configuration Circuit on an Optically Reconfigurable Gate Array VLSI Reviewed

    Seiji Ohashi, Minoru Watanabe, Nobuya Watanabe

    IEEE 43rd International Conference on Consumer Electronics (ICCE 2025)   2025.1

     More details

    Authorship:Last author   Language:English   Publishing type:Research paper (international conference proceedings)  

    researchmap

▼display all

MISC

  • Clock distribution method on FPGAs without any dedicated clock tree

    小倉歩武, 渡邊実, 渡邊誠也

    電子情報通信学会技術研究報告(Web)   124 ( 329(VLD2024 76-102) )   2025

  • 耐放射線光再構成型ゲートアレイのバッテリー駆動に向けた性能評価

    島村侑希, 渡邊 実, 渡邊誠也

    第68回宇宙科学技術連合講演会講演集   2024.11

     More details

    Authorship:Last author   Language:Japanese  

    researchmap

  • 耐放射線プログラマブルデバイス向けJTAG

    永峰直樹, 渡邊 実, 渡邊誠也

    第68回宇宙科学技術連合講演会講演集   2024.11

     More details

    Authorship:Last author   Language:Japanese   Publishing type:Research paper, summary (national, other academic conference)  

    researchmap

  • 耐放射線光再構成型ゲートアレイを用いた長距離通信

    関岡空己, 渡邊 実, 渡邊誠也

    電子情報通信学会リコンフィギャラブルシステム研究会技術研究報告 RECONF2024-48   124 ( 188 )   31 - 34   2024.9

     More details

    Authorship:Last author   Language:Japanese   Publishing type:Research paper, summary (national, other academic conference)  

    researchmap

  • 光再構成型ゲートアレイVLSIにおけるスイッチングマトリクスを利用したクロック分配法

    小倉歩武, 渡邊 実, 渡邊誠也

    電子情報通信学会リコンフィギャラブルシステム研究会技術研究報告 RECONF2024-21   124 ( 150 )   27 - 31   2024.8

     More details

    Authorship:Last author   Language:Japanese   Publishing type:Research paper, summary (national, other academic conference)  

    researchmap

▼display all

Presentations

  • Application Design System for High-Speed Dynamically Reconfigurable Gate Arrays

    Nobuya Watanabe, Ryoya Ishitani, Minoru Watanabe

    IEEE 42nd International Conference on Consumer Electronics (ICCE 2024)  2024.1.8 

     More details

    Event date: 2024.1.6 - 2024.1.8

    Language:English   Presentation type:Oral presentation (general)  

    researchmap

  • Parallel Configuration Experiment for a Radiation-Hardened Optically Reconfigurable Gate Array with a Holographic Polymer-Dispersed Liquid Crystal Memory

    Sae Goto, Minoru Watanabe, Akifumi Ogiwara, Nobuya Watanabe

    IEEE 42nd International Conference on Consumer Electronics (ICCE 2024)  2024.1.7 

     More details

    Event date: 2024.1.6 - 2024.1.8

    Language:English   Presentation type:Oral presentation (general)  

    researchmap

  • Remote Monitoring System for Optically Reconfigurable Gate Arrays Under Radiation Environments

    Utsuki Sekioka, Minoru Watanabe, Nobuya Watanabe

    IEEE 42nd International Conference on Consumer Electronics (ICCE 2024)  2024.1.7 

     More details

    Event date: 2024.1.6 - 2024.1.8

    Language:English   Presentation type:Oral presentation (general)  

    researchmap

  • Wafer Scale VLSI Realization Using Programmable Architecture

    Atsushi Takata, Minoru Watanabe, Nobuya Watanabe

    IEEE 42nd International Conference on Consumer Electronics (ICCE 2024)  2024.1.6 

     More details

    Event date: 2024.1.6 - 2024.1.8

    Language:English   Presentation type:Oral presentation (general)  

    researchmap

  • 光再構成アーキテクチャを用いたウエハースケールVLSIの実現性

    高田睦士, 渡邊実, 渡邊誠也

    電子情報通信学会リコンフィギャラブルシステム研究会(デザインガイア2023ーVLSI設計の新しい大地ー)  2023.11.17 

     More details

    Event date: 2023.11.15 - 2023.11.17

    Language:Japanese   Presentation type:Oral presentation (general)  

    researchmap

▼display all

Awards

  • Best Session Presentation Award

    2024.1   IEEE CTSoc (Consumer Technology Society), The 2024 IEEE International Conference on Consumer Electronics (ICCE 2024)   Parallel configuration experiment for a radiation-hardened optically reconfigurable gate array with a holographic polymer-dispersed liquid crystal memory

    Sae Goto

     More details

    Award type:Award from international society, conference, symposium, etc.  Country:United States

    researchmap

  • 学生奨励賞

    2023.3   情報処理学会第85回全国大会   脈流電源を用いた光再構成型ゲートアレイ

    辻野将

     More details

  • 社会貢献賞

    2023.3   岡山大学工学部   フィールドプログラマテクノロジー国際会議におけるFPGAデザインコンテスト開催への貢献

    渡邊実, 渡邊誠也

     More details

  • 教育貢献賞

    2022.3   岡山大学工学部   教育用計算機システムの充実に関する貢献

    乃村能成, 上野 史, 原 直, 渡邊誠也

     More details

  • Best Paper Award

    2022.1   The IEEE 12th Annual Computing and Communication Workshop and Conference (CCWC)   Convolutional neural network implementation using Vitas AI

    Akihiko Ushiroyama, Minoru Watanabe, Nobuya Watanabe, Akira Nagoya

     More details

▼display all

Research Projects

  • Development of hardware design system for high-speed dynamically reconfigurable devices

    Grant number:23K11032  2023.04 - 2026.03

    Japan Society for the Promotion of Science  Grants-in-Aid for Scientific Research  Grant-in-Aid for Scientific Research (C)

    渡邊 誠也, 渡邊 実

      More details

    Grant amount:\4680000 ( Direct expense: \3600000 、 Indirect expense:\1080000 )

    researchmap

  • The research on the application description technique for dynamically reconfigurable system

    Grant number:23650024  2011 - 2013

    Japan Society for the Promotion of Science  Grants-in-Aid for Scientific Research  Grant-in-Aid for Challenging Exploratory Research

    WATANABE NOBUYA

      More details

    Grant amount:\2080000 ( Direct expense: \1600000 、 Indirect expense:\480000 )

    In this research, we developed the productive and efficient description technique of applications for dynamically reconfigurable system which can expect realization of efficient processing by changing the circuit on hardware during operation. In application implementation for dynamically reconfigurable systems, we clarified the availability of the hardware design using a programming language, the possibility of description languages for graphics processing units, and the necessity of high- level description technique for hardware.

    researchmap

  • The research on the processor with dynamically reconfigurable hardware

    Grant number:21500055  2009 - 2011

    Japan Society for the Promotion of Science  Grants-in-Aid for Scientific Research  Grant-in-Aid for Scientific Research (C)

    NAGOYA Akira, TANIGUCHI Hideo, WATANABE Nobuya

      More details

    Grant amount:\4290000 ( Direct expense: \3300000 、 Indirect expense:\990000 )

    From a viewpoint of a low-power consumption and high-performance computer, we clarified the profitability of the processor which consists of dynamically reconfigurable hardware and general-purpose processor cores. We also clarified the design framework and the description language for applications and reconfigurable modules on such a new computer.

    researchmap

  • データ並列プログラミング言語のマルチスレッド拡張に関する研究

    Grant number:13780240  2001 - 2002

    日本学術振興会  科学研究費助成事業  若手研究(B)

    渡邊 誠也

      More details

    Grant amount:\1600000 ( Direct expense: \1600000 )

    本研究では,データ並列プログラムにおいて制御の並列性をユーザが明示的に記述することが可能な並列プログラミング言語を設計し,その言語処理系の実装を行なった.また,並列実行環境としてPCクラスタシステムを構築し,構築したPCクラスタ上で設計した言語および言語処理系の性能評価実験を行なった.本年度は,マルチスレッド拡張したデータ並列言語(昨年度設計)の処理系とその性能評価実験を主に行なった.
    実験用の言語処理系は,変換系(コンパイラ)と実行系(仮想マシン)で構成される.コンパイラ,実行系とも効率的な実装を行なうためにJava言語での実装を行ない,既存のコンパイラ作成支援ツールを利用した.仮想マシンの実装は,Java言語のマルチスレッド機能を利用した.さらに,PCクラスタでマルチプロセス実行を行なうために,Java言語で利用可能なメッセージ通信を行なうためのクラスライブラリの設計と実装も行なった.
    処理系を用いた評価実験は,4台のマルチプロセッサPCを100Mbpsおよび1Gbpsのネットワークスイッチで結合したPCクラスタシステム上で行なった.スレッド間でのデータ依存度が低い場合には,マルチスレッド化による効果が大きいことが分かった.効率が悪いケースについても,処理系におけるコード最適化により解決できるものもあることが分かった.
    本研究により,データ並列プログラムにおいて制御の並列性をユーザが明示的に記述する言語とその言語処理系の実装を行ない,データ並列言語をマルチスレッド拡張することの有効性を確認した.また,高効率実行のためにコード最適化手法に関する検討を行なった.

    researchmap

 

Class subject in charge

  • Compiler (2024academic year) Third semester  - 月7~8,金1~2

  • Compilers (2024academic year) Third semester  - 月7~8,金1~2

  • Compilers (2024academic year) Third semester  - 月7~8,金1~2

  • Practical Programming (2024academic year) Second semester  - 木7~8,その他

  • Practical Programming (2024academic year) Second semester  - 木7~8,その他

▼display all

 

Academic Activities

  • The International Conference on Field-Programmable Technology (FPT'22) FPGA Design Competition (Local Support Member)

    Role(s):Planning, management, etc.

    The Hong Kong University of Science and Technology  2022.12.6 - 2022.12.8

     More details

    Type:Academic society, research group, etc. 

    researchmap

  • 第11回相磯秀夫杯FPGAデザインコンテスト(2022)委員

    Role(s):Planning, management, etc.

    電子情報通信学会リコンフィギャラブルシステム研究専門委員会  2022.9.20 - 2022.9.21

     More details

    Type:Academic society, research group, etc. 

    researchmap

  • 第47回パルテノン研究会

    Role(s):Planning, management, etc., Panel moderator, session chair, etc.

    特定非営利活動法人パルテノン研究会  2021.12.25

     More details

    Type:Academic society, research group, etc. 

    researchmap

  • The International Conference on Field-Programmable Technology (FPT'21) FPGA Design Competition (Local Support Member)

    Role(s):Planning, management, etc.

    2021.12.6

     More details

    Type:Academic society, research group, etc. 

    researchmap

  • 第10回相磯秀夫杯FPGAデザインコンテスト(2021)委員

    Role(s):Planning, management, etc.

    電子情報通信学会リコンフィギャラブルシステム研究専門委員会  2021.10.24

     More details

    Type:Academic society, research group, etc. 

    researchmap